DTH8005
First issue 12 / 04
AUD_R_REC
AUD_L_REC
AUD_R_OUT
AUD_L_OUT
VDEC_VS
VDEC_HS
16/9_S2
16/9_S1
SV_R/SAPR_VS
SV_F/SAPR_HS
NICAM_RST
VBI_VC/PIP_BL
FS_BK
GEM_FS/VBI_BL
H_1H
V_1H
GEM/ST9_RST
FAN_ON
FAN_FAIL
SPDIF_OUT
IR_SAT
AV2_PIN8
R_OUT
C_OUT
Y_OUT
G_OUT
B_OUT
CV_OUT
I2C_DATA1
I2C_CLK1
HW_SW
AUDIO_SEL2/EN_ST9
1H2H_SEL
S_IN1
S_CLK1
PB_REC
EU_CVBS_REC
CVBS1_REC
Y1_REC
TUNER_REC
Y_REC
CVBS2_REC/G
C1_REC
Y2_REC/B
C2_REC/R
GND/SCART_FB
PR_REC
+5VSA
-5VE
+12VS
GND
AGND
PWR_FAIL
DGND
CLA_VID[0:7]
CLA_VCLKI
ADSCLK
ADLRCLK
ADSDATA1
CLA_ACLK
CLAHI_CWE
CLAHI_CRE
CLAHI_CCS
CLAHI_INT
CLAU_RST
PSTOP
OSVLD
OSREQ
OS[0:7]
OSCLK/OSSTB
OSSYNC
CLA_STCLK
27CK_CLA
DGND
EMI_D[0:15]
EMI_AD[1:21]
+3V3SD
+2V5SD
PB_REC
EU_CVBS_REC
CVBS1_REC
Y1_REC
TUNER_REC
Y_REC
VDEC_VS
VDEC_HS
ADMCLK
DGND
GND
CVBS2_REC/G
C1_REC
Y2_REC/B
C2_REC/R
GND/SCART_FB
+3V3SD
+1V8SD
PR_REC
VDEC_RST
VDEC_HS
VDEC_FLD
ADSCLK
ADLRCLK
PCMCLK
PCMLRCLK
PCMSCLK
PCMDATA0
PCMDATA3
DAC_MUTE
FAN_ON
FAN_FAIL
SPDIF_OUT
IR_SAT
LOGGER_IRQ
LOGGER_CS
DXX_RST
I2C_DATA
I2C_CLK
+12VS_FLASH
DGND
RNOTW
OE
WE1
WE0
EMI_D[0:15]
EMI_AD[1:21]
CE2
CE1
SYS_CS
PPC_CLK
AV_CAS
AV_WE
AV_QDML
AV_MA[0:13]
AV_MD[0:15]
+3V3SD
I2C_DATA
+3V3SD
I2C_CLK
EMI_AD[1:21]
EMI_D[0:15]
CLA_VID[0:7]
CLA_VCLKI
GS_IRQ1
PCMLRCLK
PCMSCLK
PCMDATA0
PCMDATA3
DAC_MUTE
27CK_DXX
PPC_CLK
S_CLK
S_IN
IR
IR_DXX
PWR_DOWN
BUF_OE
NSTATUS
GOB_RST
+1V8SD
+3V3SD
LOGGER_IRQ
LOGGER_CS
ODD_ATAPI_RST
ATAPI_DIOR
ATAPI_DIOW
FS_BK
GEM_FS/VBI_BL
H_1H
V_1H
SV_F/SAPR_HS
SV_R/SAPR_VS
VBI_VC/PIP_BL
ODD_IRQ
ODD_RST
DGND
+3V3SD
ODD_IRQ
ODD_RST
DRVGND
S_CLK
S_IN
+3V3SD
+5VSA
3V3ISO
3V3ISORT
27CK_DXX
+12VS_FLASH
+12VS
PWR_FAIL
ATAPI_DIOR
ATAPI_DIOW
ODD_ATAPI_IRQ
ODD_ATAPI_RST
ODD_ATAPI_IRQ
ADMCLK
ADMCLK
GEM/ST9_RST
PWR_FAIL
NICAM_RST
ATAPI_IORDY
INIT_DONE
NCONFIG
+2V5SD
+1V8SD
+5VED
+9VE
+5VED
IDE_RST
IDE_IRQ
B_DATA
B_SYNC
GS_IRQ2
I2C_CLK
I2C_DATA
RS_ERROR_EN
RS_ECCB_START
CE1
B_BCLK
B_FLAG
IR
IR_DXX
RNOTW
DGND
E2PROM_EN
MEMWAIT
CE3
FLASH_WR
AV_RAS
CE2
DXX_FLD
DXXHSYNC
CE1
OE
SYS_RST
WE0
GS_IRQ0
FM_S_IN1
RNOTW
MEMWAIT
KDB_RST
AGND
FPA_IRQ
CASO
RASO
AV_CSO
AV_QDMU
AV_SDCLK
AGND
PCMCLK
DXX_RST
+5VED
DXX_DIOW
PWR_DOWN
FM_L
FM_R
FM_L
FM_R
+12VS
FM_S_CLK1
+9VE
+5VSA
-5VE
DGND
DXX_DIOR
16/9_S1
16/9_S2
I2C_CLK
I2C_DATA
FM_CE
WE1
FM_S_OUT1
DXX656_BUF
ADLRCLK
ADSDATA2
CLA_ACLK
ADSCLK
AV2_PIN8
ADSDATA2
ADSDATA1
+2V5SD
DGND
ADSDATA2
+3V3SD
+5VSA
+9VE
-5VE
ADLRCLK
ADSCLK
ADSDATA1
AUD_L_OUT
AUD_L_REC
AUD_R_OUT
AUD_R_REC
DAC_MUTE
DGND
FM_L
FM_R
I2C_CLK
I2C_DATA
PCMCLK
PCMDATA0
PCMDATA3
PCMLRCLK
PCMSCLK
AUDIO_CODEC
+3V3SD
+5VED
ADMCLK
ATAPI_IORDY
CLAHI_CCS
CLAHI_CRE
CLAHI_CWE
CLAHI_INT
CLA_ACLK
DGND
DXXHSYNC
DXX_FLD
EMI_AD[1:21]
EMI_D[0:15]
FM_CE
FM_S_CLK1
FM_S_IN1
FM_S_OUT1
FPA_IRQ
FS_BK
GEM_FS/VBI_BL
GS_IRQ0
GS_IRQ1
GS_IRQ2
H_1H
IDE_IRQ
INIT_DONE
KDB_RST
LOGGER_IRQ
MEMWAIT
NCONFIG
NSTATUS
ODD_ATAPI_IRQ
ODD_IRQ
OSCLK/OSSTB
OSREQ
OSSYNC
OSVLD
OS[0:7]
PCMCLK
PPC_CLK
PSTOP
PWR_FAIL
SV_F/SAPR_HS
SV_R/SAPR_VS
VBI_VC/PIP_BL
VDEC_FLD
VDEC_HS
V_1H
ATAPI_DIOR
ATAPI_DIOW
BUF_OE
CE1
CE2
CLAU_RST
DXX656_BUF
DXX_RST
GEM/ST9_RST
GOB_RST
IDE_RST
LOGGER_CS
NICAM_RST
ODD_ATAPI_RST
ODD_RST
OE
RNOTW
SYS_RST
VDEC_RST
WE0
WE1
GOBSTOPPER
+2V5SD
I2C_CLK
I2C_DATA
+1V8SD
+3V3SD
16/9_S2
ADMCLK
C1_REC
C2_REC/R
CLA_VCLKI
CLA_VID[0:7]
CVBS1_REC
CVBS2_REC/G
DGND
GND
EU_CVBS_REC
GND/SCART_FB
TUNER_REC
VDEC_FLD
VDEC_HS
VDEC_VS
Y1_REC
Y2_REC/B
VDEC_RST
VDEC_HS
VIDEO_DECODER
SHT2of9
16/9_S1
Y_REC
PB_REC
PR_REC
+2V5SD
+3V3SD
27CK_CLA
ADLRCLK
ADSCLK
ADSDATA1
CLAHI_CCS
CLAHI_CRE
CLAHI_CWE
CLAHI_INT
CLA_ACLK
CLA_STCLK
CLA_VCLKI
CLA_VID[0:7]
DGND
EMI_AD[1:21]
EMI_D[0:15]
OSCLK/OSSTB
OSREQ
OSSYNC
OSVLD
OS[0:7]
PSTOP
CLAU_RST
MPEG
ENCODER
+12VS_FLASH
+3V3SD
AV_MA[0:13]
AV_MD[0:15]
AV_QDML
AV_QDMU
AV_SDCLK
DGND
EMI_AD[1:21]
EMI_D[0:15]
FLASH_WR
I2C_CLK
I2C_DATA
LOGGER_IRQ
MEMWAIT
PPC_CLK
AV_CAS
AV_CS0
AV_RAS
AV_WE
CAS0
CE1
CE2
CE3
DXX_RST
E2PROM_EN
LOGGER_CS
OE
RAS0
RNOTW
SYS_CS
WE0
WE1
MEMORY
+12VS
+12VS_FLASH
+1V8SD
+2V5SD
+3V3SD
+5VED
+5VSA
+9VE
27CK_CLA
27CK_DXX
3V3ISO
3V3ISORT
ADMCLK
AGND
ATAPI_IORDY
B_BCLK
B_DATA
B_FLAG
B_SYNC
CLA_STCLK
DGND
DRVGND
EMI_AD[1:21]
EMI_D[0:15]
IDE_IRQ
IR
IR_DXX
ODD_ATAPI_IRQ
ODD_IRQ
PWR_DOWN
PWR_FAIL
RS_ECCB_START
RS_ERROR_EN
S_CLK
S_IN
ATAPI_DIOR
ATAPI_DIOW
CE1
DXX_DIOR
DXX_DIOW
IDE_RST
ODD_ATAPI_RST
ODD_RST
RNOTW
CLOCK/ATAPI/PWR
FROM SHT6
TO SHT6
CIRCUIT DIAGRAM
FROM/TO
FROM
SHT5
SHT7
FROM SHT8
IDR03_2ND_GE
FROM SHT6
FROM/TO SHT4
FROM/TO SHT7
FROM /TO
SHT4
SHT7
FROM SHT2,6
TO/FROM
SHT8
FROM SHT10
FROM/TO
TO
SHT4
SHT3
TO SHT8
FROM /TO
TO SHT4 & SHT7
FROM SHT4
FROM/TO SHT7
FROM SHT6
TO SHT2
FROM/TO SHT4
SHT2,3,9
TO
SHT5
TO/FROM
TO/FR.SHT9
FROM SHT7
TO/FR.SHT8
TO SHT3
TO SHT8
FROM SHT2
FROM
SHT8
FROM SHT7
FROM/TO SHT7
TO SHT3
TO/FROM SHT6
FROM SHT5
FROM SHT4
FROM SHT3
AUDIO_SEL1
+12VS
+1V8SD
+3V3SD
+5VED
1H2H_SEL
27CK_DXX
ADLRCLK
ADSCLK
ADSDATA2
AGND
AUDIO_SEL1
AUDIO_SEL2/EN_ST9
AV2_PIN8
AV_MA[0:13]
AV_MD[0:15]
AV_QDML
AV_QDMU
AV_SDCLK
B_BCLK
B_DATA
B_FLAG
B_OUT
B_SYNC
CLA_ACLK
CLA_VCLKI
CLA_VID[0:7]
CV_OUT
C_OUT
DAC_MUTE
DGND
DXXHSYNC
DXX_FLD
EMI_AD[1:21]
EMI_D[0:15]
FAN_FAIL
FAN_ON
FLASH_WR
FM_CE
FM_L
FM_R
FM_S_CLK1
FM_S_IN1
FM_S_OUT1
FPA_IRQ
GS_IRQ0
GS_IRQ1
GS_IRQ2
G_OUT
HW_SW
I2C_CLK
I2C_CLK1
I2C_DATA
I2C_DATA1
INIT_DONE
IR
IR_DXX
IR_SAT
KDB_RST
MEMWAIT
NCONFIG
NSTATUS
PCMCLK
PCMDATA0
PCMDATA3
PCMLRCLK
PCMSCLK
PPC_CLK
PWR_DOWN
RS_ECCB_START
RS_ERROR_EN
R_OUT
SPDIF_OUT
S_CLK
S_CLK1
S_IN
S_IN1
Y_OUT
AV_CAS
AV_CS0
AV_RAS
AV_WE
BUF_OE
CAS0
CE1
CE2
CE3
DXX656_BUF
DXX_DIOR
DXX_DIOW
DXX_RST
E2PROM_EN
GOB_RST
OE
RAS0
RNOTW
SYS_CS
SYS_RST
WE0
WE1
MEMWAIT
PPC_CLK
CE1
IR
IR_DXX
RNOTW
MPEG
DECODER
AV2_PIN8
+12VS
+5VSA
-5VE
16/9_S1
16/9_S2
1H2H_SEL
AGND
AUDIO_SEL1
AUDIO_SEL2/EN_ST9
AUD_L_OUT
AUD_L_REC
AUD_R_OUT
AUD_R_REC
B_OUT
C1_REC
C2_REC/R
CVBS1_REC
CVBS2_REC/G
CV_OUT
C_OUT
DGND
EU_CVBS_REC
FAN_FAIL
FAN_ON
FS_BK
GEM_FS/VBI_BL
GND
GND/SCART_FB
G_OUT
HW_SW
H_1H
I2C_CLK1
I2C_DATA1
IR_SAT
PB_REC
PR_REC
PWR_FAIL
R_OUT
SPDIF_OUT
SV_F/SAPR_HS
SV_R/SAPR_VS
S_CLK1
S_IN1
TUNER_REC
VBI_VC/PIP_BL
VDEC_HS
VDEC_VS
V_1H
Y1_REC
Y2_REC/B
Y_OUT
Y_REC
GEM/ST9_RST
NICAM_RST
VOUT
DECODER
MPEG
IDR03 2ND GEN DIGITAL
MPEG
CIRCUIT DIAGRAM
(DIGITAL BOARD 1/9)
MAIN SCHEMATIC DIAGRAM - SCHEMA DE LA PLATINE PRINCIPALE - SCHALTBILD HAUPTPLATINE - SCHEMA DELLA PIASTRA PRINCIPALE- ESQUEMA DE LA PLATINA PRINCIPAL
