December 2002 © TOSHIBA TEC
11 - 5
e-STUDIO160/200/250 DRUM-RELATED SECTION
Development (Magnetic roller)
The CPU (IC66) loads reference voltage data for development bias into the register of the system control
GA (IC34).
↓
The system control GA converts the data loaded into the register to a DI signal (ADC setting signal) in
serial format and sends it to the D/A converter (IC17) at the timing of the CLK signal (transfer clock signal)
and the LD signal (load data signal).
↓
The D/A converter converts the input data to a DVVR signal (development bias reference voltage signal)
in analog form and sends it to the HVPS.
↓
The HVPS generates high voltage based on the voltage value of the DVVR signal and delivers it to the
magnetic roller.
There are the following two cases where high voltage is delivered to the magnetic roller: the delivery of
positive voltage (during initial operation) and the delivery of negative voltage (during printing operation).
Only during the delivery of positive voltage, the development bias voltage is delivered or cut off synchro-
nizing with the timing of the SPON signal (separation charger control signal). When the SPON signal is at
“Low” level, the positive voltage is delivered.
Transfer (Transfer charger)
The CPU (IC66) loads reference voltage data for transfer bias into the register of the system control GA
(IC34).
↓
The system control GA converts the data loaded into the register to a DI signal (ADC setting signal) in
serial format and sends it to the D/A converter (IC17) at the timing of the CLK signal (transfer clock signal)
and the LD signal (load data signal).
↓
The D/A converter converts the input data to a TCVR signal (transfer bias reference voltage signal) in
analog form and sends it to the HVPS.
↓
The I/O port GA-2 (IC6) turns the TCON signal (transfer charger control signal) to “Low” level.
↓
The HVPS generates current based on the voltage value of the TCVR and delivers it to the transfer
charger.
Summary of Contents for e-studio 160
Page 2: ... 2002 TOSHIBA TEC CORPORATION All rights reserved ...
Page 223: ...e STUDIO160 200 250 PCB BOARD 16 2 December 2002 TOSHIBA TEC 16 2 PWA F RLY 16 02 01 ...
Page 224: ...December 2002 TOSHIBA TEC 16 3 e STUDIO160 200 250 PC BOARD 16 3 PWA F PIF 16 03 01 ...
Page 226: ...December 2002 TOSHIBA TEC 16 5 e STUDIO160 200 250 PC BOARD 16 6 PWA F SLG 16 06 01 ...
Page 228: ...17 WIRE HARNESS CONNECTION DIAGRAMS 17 1 ...
Page 255: ...1 1 KANDA NISHIKI CHO CHIYODA KU TOKYO 101 8842 JAPAN ...