e-STUDIO160/200/250 DISPLAY UNIT
5 - 16
December 2002 TOSHIBA TEC
(4) LCD Controller Block Diagram
(5) Data Transmission Method
System
Resister
Address
Main board
SRAM
Data
Address
FLM
SD
LP
SCP
Clock
Data
SRAM
control
Timing
generator
Bit check
control
Attribute
control
Line
memory
control
Line
memory
CPI (LP)
64
1
FLM
240
48,240
1,1
1,2
1,240
2,1
1
2
3
240
1
2
CP2 (SCP)
CPI (LP)
D
64, (1~240)
1, (1~240)
2, (1~240)
1, (1~240)
D
63
64
64
1
2
1
Summary of Contents for e-studio 160
Page 2: ... 2002 TOSHIBA TEC CORPORATION All rights reserved ...
Page 223: ...e STUDIO160 200 250 PCB BOARD 16 2 December 2002 TOSHIBA TEC 16 2 PWA F RLY 16 02 01 ...
Page 224: ...December 2002 TOSHIBA TEC 16 3 e STUDIO160 200 250 PC BOARD 16 3 PWA F PIF 16 03 01 ...
Page 226: ...December 2002 TOSHIBA TEC 16 5 e STUDIO160 200 250 PC BOARD 16 6 PWA F SLG 16 06 01 ...
Page 228: ...17 WIRE HARNESS CONNECTION DIAGRAMS 17 1 ...
Page 255: ...1 1 KANDA NISHIKI CHO CHIYODA KU TOKYO 101 8842 JAPAN ...