6 F 2 T 0 1 7 2
transformer energisation, and can block the NPS1 and NPS2 elements by the scheme switches
[NPS1-2F] and [NPS2-2F] respectively. See section 2.9.
NPS1
NPS1 TRIP
0.00 - 300.00s
TNPS1
t
0
+
"ON"
[NPS1EN]
&
"ON"
[NPS2EN]
+
NPS BLOCK
1
NPS2 ALARM
0.00 - 300.00s
TNPS2
t
0
NPS2
80
79
137
136
&
[NPS2-2F]
“Block”
+
ICD
&
[NPS1-2F]
“Block”
+
ICD
&
Figure 2.6.1 Negative Sequence Overcurrent Protection Scheme Logic
The tripping and alarming can be disabled by scheme switches [NPS1], [NPS2] or binary input
signal NPS BLOCK.
Settings
The table below shows the setting elements necessary for the NSOP protection and their setting
ranges.
Element
Range
Step
Default
Remarks
NPS1
0.10 -10.0 A
0.01 A
0.40 A
NPS1 threshold setting for tripping.
NPS2
0.10 -10.0 A
0.01 A
0.20 A
NPS2 threshold setting for alarming.
TNPS1
0.00 – 300.00 s
0.01 s
0.00 s
NPS1 definite time setting
TNPS2
0.00 – 300.00 s
0.01 s
0.00 s
NPS2 definite time setting
[NPS1EN]
Off / On
Off
NPS1 Enable
[NPS2EN]
Off / On
Off
NPS2 Enable
Sensitive setting of NPS1 and NPS2 thresholds is restricted by the negative phase sequence current
normally present on the system. The negative phase sequence current is measured in the relay
continuously and displayed on the metering screen of the relay front panel along with the maximum
value. It is recommended to check the display at the commissioning stage and to set NPS1 and
NPS2 to 130 to 150% of the maximum value displayed.
The delay time setting TNPS1 and TNPS2 is added to the inherent delay of the measuring elements
NPS1 and NPS2. The minimum operating time of the NPS elements is around 200ms.
39
Summary of Contents for GRE110
Page 183: ...6 F 2 T 0 1 7 2 Appendix B Signal List 184 ...
Page 191: ...6 F 2 T 0 1 7 2 Appendix C Event Record Items 192 ...
Page 196: ...6 F 2 T 0 1 7 2 Appendix D Binary Output Default Setting List 197 ...
Page 199: ...6 F 2 T 0 1 7 2 Appendix E Relay Menu Tree 200 ...
Page 210: ...6 F 2 T 0 1 7 2 Appendix F Case Outline 211 ...
Page 211: ...6 F 2 T 0 1 7 2 Case Outline for model 400 401 420 421 820 and 821 212 ...
Page 212: ...6 F 2 T 0 1 7 2 Case Outline for model 402 and 422 213 ...
Page 213: ...6 F 2 T 0 1 7 2 Appendix G Typical External Connection 214 ...
Page 245: ...6 F 2 T 0 1 7 2 Appendix J Return Repair Form 246 ...
Page 249: ...6 F 2 T 0 1 7 2 Customer Name Company Name Address Telephone No Facsimile No Signature 250 ...
Page 250: ...6 F 2 T 0 1 7 2 Appendix K Technical Data 251 ...
Page 256: ...6 F 2 T 0 1 7 2 Appendix L Symbols Used in Scheme Logic 257 ...
Page 259: ...6 F 2 T 0 1 7 2 Appendix M Modbus Interoperability 260 ...
Page 289: ...6 F 2 T 0 1 7 2 Appendix N IEC60870 5 103 Interoperability 290 ...
Page 296: ...6 F 2 T 0 1 7 2 Appendix O PLC Default setting 297 ...
Page 298: ...6 F 2 T 0 1 7 2 Appendix P Inverse Time Characteristics 299 ...
Page 304: ...6 F 2 T 0 1 7 2 Appendix Q IEC61850 Interoperability 305 ...