19
6
F
2
S
0
8
5
0
oscillator in the slave terminal.
The difference of the transmission delay time Tdd (= Td1
−
Td2) is set to zero when sending and
receiving take the same route and exhibit equal delays. When the route is separate and the
sending and receiving delays are different, Tdd must be set at each terminal to be equal to the
sending delay time minus the receiving delay time. The maximum Tdd that can be set is 10ms.
(For setting, see Section 4.2.6.7. The setting elements of transmission delay time difference are
TCDT1 and TCDT2.)
The time TM measured at the master terminal is sent to the slave terminal together with the
current data and is used to calculate the
∆
T.
The permissible maximum transmission delay time of the channel is 10ms.
In case of the three-terminal line application, the communication ports of the GRL100 are
interlinked with each other as shown in Figure 2.2.7.2, that is, port CH1 of one terminal and port
CH2 of the other terminal are interlinked. For the setup of the communication system, see
Section 2.2.13.3.
When terminal A is set as the master terminal by the scheme switch [SP.SYN], the
synchronization control is performed between terminals A and B, and terminals B and C. The
terminal B follows the terminal A and the terminal C follows the terminal B. The slave terminals
perform the follow-up control at their communication port CH2.
When the master terminal is out-of-service in A-MODE, the slave terminal that is interlinked
with port 1 of the master terminal takes the master terminal function. In the case shown in Figure
2.2.7.2, terminal B takes the master terminal function when the master terminal A is
out-of-service. In B-MODE and GPS-MODE, even if the master terminal is out-of-service, the
master terminal is not changed. If DC power supply of the out-of-service terminal is “OFF”,
differential elements at all terminals are blocked. Therefore, the [TERM] setting change from
“3TERM” to “2TERM” is required.
GRL100
Terminal B
Terminal A
Terminal C
CH1
Communication
port
GRL100
GRL100
Master
Slave
Slave
CH2
CH1
CH2
CH1
CH2
Figure 2.2.7.2 Communication Link in Three-terminal Line
Sampling address synchronization
The principle of sampling address synchronization control is indicated in Figure 2.2.7.3. After
time synchronization has been established, the slave terminal measures the time from sending its
own timing reference signal until it returns from the master terminal. The transmission delay
time Td1 from slave to master terminal can be calculated from equation (4).
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Summary of Contents for GRL100-701B
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