SDRAM Circuit Diagram
SDRAM speed <=7ns
JP20,JP21 settings:
1)Play mode: All Jumps off
2)Download mode: JP3's 1-2 short only
3)SW Debug mode: JP2's 1-2 short only
Download
Debug
ADD KEY4 FOR DEL PT831T
CHANGE FROM 0402 TO 0603
When down load and degub.
R414,R415 should be OPEN.
For EMI/ESD
For EMI/ESD
For EMI/ESD
For EMI/ESD
Change D-terminal control pin.
For EMI/ESD
For ESD/EMI
For ESD/EMI
For EMI/ESD
For EMI/ESD
For EMI/ESD
FPC_DOUT
FPC_CLK
OUTSW
DRVSB
MEMAD9
CLOSE
DUPTD1
MEMAD17
MEMAD12 PLLCFGA
DUPTD0
DUPTD0
DUPRD0
DUPRD0
MEMDA12
MEMAD11 PLLCFGP
MEMAD13
RESET-
MEMDA4
IALRCLK
OSCOUT
MEMDA15
MEMAD3
MEMRD-
MEMDA0
IRRCV
MEMAD4
READY1
OSCIN
MEMAD5
MEMDA9
MEMDA13
MEMAD16
HOMESW
LDON
MEMDA7
FPC_STB
I2CDAT
OPEN
INSW
MEMAD8
IABCLK
MIRR
I2CCLK
MEMDA8
MEMAD7
MEMAD10
MEMAD14
MEMAD15
DEFECT
MEMAD2
MEMDA6
MEMDA14
MEMDA10
MEMDA5
IAMCLK
MEMAD6
MEMAD18
MEMDA11
AOUT0
MEMDA1
MEMDA3
MEMDA2
OSCIN
MEMCS1-
MEMCS0-
MEMWR-
MEMAD0
MEMAD1
RESET-
OSCOUT
DUPRD1
SVCC33
VDDA
VBIASS1
FS1
FS2
FS3
RAMVCC
DSPVCC33
CKE
LDON
HOMESW
MEMAD19
READY2
SPDL_SENS
4
DEFECT
4
MIRR
4
IRRCV
7
FPC_STB
7
FPC_CLK
7
MEMRD-
6
MEMCS0-
6
MEMAD[19:0]
6
MEMDA[15:0]
6
C_B_U
5
Y_R_V
5
CVBS_C
5
CVBS_G_Y 5
VR_SEL
4
INSW
4
KEY1
7
LDON
4
ABCLK
5
AOUT0
5
CLOSE
4
FS1
5,7
I2CDAT
5,6
OUTSW
4
ALRCLK
5
KEY3
7
SPDIF
7
ML
5
FS3
7
RESET-
6
OPEN
4
READY
4,7
AOUT3
5
FS2
7
I2CCLK
5,6
KEY2
7
AMCLK
5
DRVSB
4
AMUTE
5
MEMCS1-
6
DSPVCC18
7
FPC_DIN
7
FPC_DOUT
7
MEMWR-
6
KEY4
7
D+5V
5,6,7
D-FS1
5
HOMESW 4
READY2
DSPVCC33
DSPVCC33
DSPVCC18
DSPVCC33
DSPVCC18
DSPVCC33
STB+5V
DSPVCC33
SGND
SGND
SGND
SGND
SGND
SGND
SGND
SGND
SGND
SGND
SGND
SGND
SGND
SGND
SGND
SGND
D+5V
DSPVCC18
SGND
SGND
SGND
SGND
SGND
SGND
SGND
SGND
SGND
SGND
C146
NC/5pF
J13
HyperT-I/F
1
2
3
4
J14
Down-I/F
1
2
3
4
FB36
FBR
C78
NC
C4
0.1uF
C5
0.1uF
C545
1nF
C557
1nF
C562
0.1uF
C559
0.1uF
C555
NC
C563
0.1uF
C560
0.1uF
C554
NC
C561
0.1uF
C558
0.1uF
FB2
FBR
C553
1nF
C552
1nF
C551
1nF
C76
0.1uF
R405
33R
C568
0.1uF
R414
4.7K
R415
4.7K
C542
1nF
C543
1nF
C544
1nF
R5
1K
D2
IN4148
C546
1nF
C556
NC
C547
1nF
C548
1nF
R435
0R
C550
1nF
C549
1nF
C541
0.1uF
C540
0.1uF
C539
0.1uF
R559
33
C12
0.1uF
TP112
1
.
R228
NC
JP2
CN2.54MM3P-M(BOOTSEL2)
TP113
1
.
C13
0.1uF
R12
33
JP3
CN2.54MM3P-M(BOOTSEL1)
C581
1nF
C36
0.1uF
C34
0.1uF
+
C22
47uF/16V
R19
4.7K
C11
0.1uF
C24
0.1uF
C17
0.1uF
C16
0.1uF
R2
220K
R17
33
C25
0.1uF
C19
0.1uF
R1
150
U3
K4S161622/EM636165TS
C9
22pF
C8
0.1uF
FB4
FBR
C35
0.1uF
C569
NC
C18
0.1uF
C31
0.1uF
C1
220pF
+
C132
220uF/16V
R9
10K
U1
ZR36762
12
1
2
3
4
5
6
7
8
9
10
11
50
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
51
52
105
156
155
154
152
151
145
136
144
143
142
141
140
139
138
127
125
124
123
122
121
120
119
118
117
116
115
114
113
112
111
110
39
40
41
42
43
44
45
46
47
48
49
106
107
108
109
126
128
129
130
131
132
133
134
135
137
146
147
148
149
150
153
GNDP
SSCRXD/GPCIO[17]
MEMCS[1]#/GPCIO[18]
VDDP
MEMAD[15]/PLLPROG[0]
MEMAD[16]/PLLPROG[1]
MEMAD[14]/PLLPROG[2]
MEMAD[13]/AFETESTEN
MEMAD[12]/[PLLCFGA]
MEMDA[15]
MEMAD[11]/[PLLCFGP]
MEMDA[7]
GNDP
MEMAD[10]/[TESTMODE]
MEMDA[14]
MEMAD[9]
MEMDA[6]
MEMAD[8]
MEMDA[13]
MEMDA[5]
MEMAD[20]/[GPCIO19]/[MEMCS#2]
VDDP
MEMDA[12]
MEMWR#
MEMDA[4]
VDDC
MEMDA[11]
MEMDA[3]
MEMAD[19]/[PLLSEL]
GNDC
MEMDA[10]
MEMAD[18]
GNDP
MEMDA[2]
MEMAD[17]
MEMDA[9]
MEMAD[7]
MEMDA[1]
MEMAD[6]
VDD-IP
VDDP
VDDP
DUPTD1/GPCIO38
DUPRD1/GPCIO37
VDD-IP
DUPRD0/GPCIO35
GNDP
GPCI/O[32]
GPCI/O[31]
VDDP
GCLKA
GCLKP
XO
VDDA
RESET#
GNDA
VDDP
GNDP
HSYNC/GPCIO25/[CJTDO]
VDDC
VSYNC/GPCIO24/[CJTDI]
GNDC
AIN/[GPCIO23/CJTCK]
VDDP-A2
AMCLK
GNDP-A2
ABCLK
ALRCLK
GPAIO/[AOUT3]
AOUT[0]
AOUT[1]/[GPCIO22]
AOUT[2]/[GPCIO21]
SPDIF
MEMDA[8]
MEMAD[5]
VDDP
MEMDA[0]
MEMAD[4]
MEMRD#
MEMAD[3]
MEMAD[2]
MEMCS[0]#
MEMAD[1]/[BOOTSEL2]
MEMAD[0]/[A]PLLSEL/[BOOTSEL1]
CPUNMI/GPCIO[20]
GNDP
[A]GPCIO110/BOOTSEL1/[AOUT3/ICGPCIO0]
[A]GPCIO111/BOOTSEL2/[IDGPCIO0]
COSYNC/GPCIO120/[ICGPCIO1/CJTMS]
GPCIO26/ICETMS/[DJTMS]
ICETDI/GPCIO122/[ICGPCIO2/DJTDI]
ICETDO/GPCIO123/[IDGPCIO1/DJTDO]
ICETCK/GPCIO27/[DJTCK]
GPCIO28/DJTMS
GPCIO29/DJTDI
GPCIO30/DJTDO
GPCIO128/DJTCK/[ICGPCIO3]
GPCI/O[130]/[IDGPCIO2]
GPCI/O[135]/[ICGPCIO4]
GPCI/O[33]
GPCI/O[137]/[ICGPCIO5]
GPCI/O[34]
GPCI/O[139]/[IDGPCIO3]
DUPTD0/GPCIO36
C38
0.1uF
C15
0.1uF
R11
0
R6
47K
+
-
3
2
1
C6
0.1uF
R14
33
C2
22pF
+
C23
47uF/16V
C32
0.1uF
C211
0.1uF
R562
75R
R560
100R
R10
4.7K
C33
0.1uF
R20
4.7K
C21
0.1uF
C14
0.1uF
R561
75R
+
C3
100uF/16V
C37
0.1uF
C28
0.1uF
C20
0.1uF
FB3
FBR
R4
100K
C26
0.1uF
R16
33
U4
JP1
CN2.54MM2P-M(RESET button)
R13
33
FB21
33
TP5
1
.
C27
0.1uF
+
C10
100uF/16V
C7
0.1uF
C39
0.1uF
L1
2.7uH
C30
0.1uF
C29
0.1uF
R64
10K 1%
Y1
27.000MHz
R60
10K/1%
R63
10K 1%
C86
0.1uF
K4S161622/EM636165TS
U2A
TL3472
(D358)
