Chapter 10 PCI Controller
10-102
10.5.4 Power Management Control/Status Register (PMCSR)
0xE0
15
9
8
7 2 0
PMESTA
Reserved
PMEEN
Reserved PS
R R
R :
Type
0 0
00
:
Initial
value
Bits Mnemonic Field
Name
Description
15
PMESTA
PME Status
PME_Status (Initial value: 0, R)
On TX4925 the function is not supported.
14:9
⎯
Reserved
⎯
8
PMEEN
PME Enable
PME_En (Initial value: 0, R)
On TX4925 the function is not supported.
7:2
⎯
Reserved
⎯
1:0
PS
Power State
PowerState (Initial value: 00, R)
Sets the Power Management state.
The Power Management State Change bit (P2GSTATUS.PMSC) of the P2G Status
Register is set when the value of this field is changed. It also becomes possible to
generate a Power State Change Interrupt at this time.
The TX4925 can read the value of this field from the PowerState field
(PCISSTATUS.PS) of the Satellite Mode PCI Status Register.
00b: D0 (no change)
01b: D1 :Reserved
10b: D2 :Reserved
11b: D3hot
Figure 10.5.4 Power Management Control/Status Register
Summary of Contents for TMPR4925
Page 1: ...64 Bit TX System RISC TX49 Family TMPR4925 Rev 3 0 ...
Page 4: ......
Page 15: ...Handling Precautions ...
Page 16: ......
Page 18: ...1 Using Toshiba Semiconductors Safely 1 2 ...
Page 40: ...3 General Safety Precautions and Usage Considerations 3 18 ...
Page 42: ...4 Precautions and Usage Considerations 4 2 ...
Page 43: ...TMPR4925 ...
Page 44: ......
Page 54: ...Chapter 1 Features 1 8 ...
Page 58: ...Chapter 2 Block Diagram 2 4 ...
Page 88: ...Chapter 4 Address Mapping 4 12 ...
Page 226: ...Chapter 8 DMA Controller 8 58 ...
Page 260: ...Chapter 9 SDRAM Controller 9 34 ...
Page 480: ...Chapter 15 Interrupt Controller 15 32 ...
Page 554: ...Chapter 19 Real Time Clock RTC 19 8 ...
Page 555: ...Chapter 20 Removed 20 1 20 Removed ...
Page 556: ...Chapter 20 Removed 20 2 ...
Page 564: ...Chapter 21 Extended EJTAG Interface 21 8 ...
Page 580: ...Chapter 22 Electrical Characteristics 22 16 ...
Page 588: ...Chapter 24 Usage Notes 24 2 ...