Integrated Peripherals
Phoenix – AwardBIOS CMOS Setup Utility
Integrated Peripherals
OnChip IDE Device [Press Enter]
Onboard Device [Press Enter]
SuperIO Device [Press Enter]
Item Help
Menu Level
¾
↑↓←→
Move Enter: /-/PU/PD: Value F10:Save ESC: Exit F1:General Help
F5:Previous Values F6:Fail-safe defaults F7:Optimized Defaults
OnChip IDE Device
Phoenix – AwardBIOS CMOS Setup Utility
OnChip IDE Device
IDE HDD Block Mode
[Enabled]
IDE DMA transfer access [Enabled]
On-Chip Primary PCI IDE
[Enabled]
IDE Primary Master PIO [Auto]
IDE Primary Salve PIO
[Auto]
IDE Primary Master UDMA
[Auto]
IDE Primary Salve UDMA [Auto]
On-Chip Secondary PCI IDE [Enabled]
IDE Secondary Master PIO [Auto]
IDE Secondary Master PIO [Auto]
IDE Secondary Master UDMA [Auto]
IDE Secondary Salve UDMA [Auto]
***On-Chip Serial ATA Setting***
x SATA Mode
IDE
On-Chip Serial ATA [Disabled]
x Serial ATA Port0 Mode
Primary Master
Serial ATA Port1 Mode [Primary Slave]
Item Help
Menu Level
¾
If your IDE hard drive
supports block mode
select Enabled for
automatic detection of
the optimal number of
block read/writes per
sector the drive can
support
↑↓←→
Move Enter: /-/PU/PD: Value F10:Save ESC: Exit F1:General Help
F5:Previous Values F6:Fail-safe defaults F7:Optimized Defaults
68
TR-5001 User Manual
Summary of Contents for TR-5001
Page 29: ...Jumper Locations on the TR 979 COM2MODE JP9 JP8 25 TR 5001 User Manual...
Page 92: ...Appendix I O Port Address Map Interrupt Request Lines IRQ POST Beep 88 TR 5001 User Manual...
Page 96: ......
Page 97: ......
Page 98: ......
Page 99: ......
Page 100: ......
Page 101: ......
Page 102: ......
Page 103: ......
Page 104: ......