TE0600 TRM
Revision: V3.02
Copyright © 2017 Trenz Electronic GmbH
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Document Change History
Date
Revision
Contributors
Description
2011-10-01
0.01
AIK
Release.
2011-10-05
0.02
AIK
Added B2B pin-out section.
2011-10-06
0.03
AIK
Reformatted pin-out tables. Added eFUSE programming section.
2011-10-06
0.04
AIK
Added board photos. Additions to eFUSE section.
2011-10-06
0.05
AIK
Removed net length information for nets which can't be measured right.
2011-10-06
0.06
AIK
Added power consumption section.
2011-10-08
0.07
AIK
Little fixes after FDR audit.
2011-10-12
0.08
AIK
Fix in eFUSE section.
2011-11-11
0.09
AIK
Added pin numbering description for B2B connectors
2012-01-20
0.10
AIK
Added pin compatibility note and manual reference.
2012-04-12
0.11
AIK
Added FPGA banks VCCIO voltages table.
2012-04-17
1.00
FDR
Updated documentation link.
Replaced obsolete ElDesI and RedMine links with current GitHub links.
Updated dating convention.
2012-05-18
1.01
AIK
Corrected cross-reference in section 3.2. Corrected LED description.
2012-06-18
1.02
FDR
Removed junction temperature limits under connector current ratings.
2012-07-18
1.03
AIK
Added table with B2B signals summary per FPGA bank
2012-10-30
2.01
AIK
Fork to 01 and 02 board revisions
2012-11-06
2.01
AIK
Fixed bank 1 power options
2012-11-21
2.02
AIK
Updated module diagram
2012-11-30
2.03
AIK
Added Ethernet disable note
2012-12-19
2.04
AIK
Fixed SPI Flash size on block diagram
2013-01-21
2.05
AIK
Added PHY reset note
2013-03-13
2.06
AIK
Connectors current chapter moved to separate document
2013-03-13
2.07
AIK
Changed Bank 1 power supply description and VCCIO0 sources description
2016-01-29
2.08
AIK
Pause advertise correction
2016-11-05
3.00
FDR
Document ported to wiki and adapted to web presentation.
2017-04-03
V3.02
TT
Added REV03 to assembly Variant Table
