55
Node memory Interleave
Disable
AUTO
Interleave memory
blocks across
processor nodes BIOS
will AUTO detect capa-
bility of Memory Sys-
tem.
Note: This cannot be
enabled if ACPI
SRAT table is also
enabled. Changing one
value will also toggle
the other.
ECC
Enable
Disable
ECC check/correct
mode. This enables
function for all blocks
within the
core and North Bridge.
DRAM ECC
Enable
Disable
If all memory in the
system supports ECC,
enabling this will scrub
DRAM and enable the
system requests to
DRAM to be checked
and/or corrected.
ECC Scrub Redirection
Enable
Disable
Enables ECC Scrubber
to correct errors
detected in DRAM dur-
ing normal CPU
requests.
4-bit ECC
Enable
Disable
Enables 4-bit ECC
mode on Nodes with
ECC capable dims.
DCACHE ECC Scrub
CTL
Disable
40ns/80ns/
160ns/320n
s/640ns/1.2
8us/2.56us
Sets the rate of back-
ground scrubbing for
DCACHE lines.
L2 ECC Scrub CTL
Disable
40ns/80ns/
160ns/320n
s/640ns/1.2
8us/2.56us
Sets the rate of back-
ground scrubbing for
L2 cache lines.
Feature
Option
Description
Summary of Contents for B4882
Page 1: ...Transport TX46 B4882 User s Manual Document part number D1614 100...
Page 8: ...Technical support 63 Help resources 63 Returning merchandise for service 63...
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