LARA-R2 series - System Integration Manual
UBX-16010573 - R02
Objective Specification
Design-in
Page 113 of 148
2.6.5
SDIO interface
2.6.5.1
Guidelines for SDIO circuit design
The functionality of the SDIO Secure Digital Input Output interface pins is not supported by LARA-R2
series modules “02” product versions: the pins should not be driven by any external device.
LARA-R2 series modules include a 4-bit Secure Digital Input Output interface (
SDIO_D0
,
SDIO_D1
,
SDIO_D2
,
SDIO_D3
,
SDIO_CLK
,
SDIO_CMD
) designed to communicate with an external u-blox short range Wi-Fi module.
Combining a u-blox cellular module with a u-blox short range communication module gives designers full access
to the Wi-Fi module directly via the cellular module, so that a second interface connected to the Wi-Fi module is
not necessary. AT commands via the AT interfaces of the cellular module allows full control of the Wi-Fi module
from any host processor, because Wi-Fi control messages are relayed to the Wi-Fi module via the dedicated SDIO
interface.
Further guidelines for SDIO interface circuit design will be described in detail in a successive release of the
System Integration Manual.
Do not apply voltage to any SDIO interface pin before the switch-on of SDIO interface supply source
(
V_INT
), to avoid latch-up of circuits and allow a proper boot of the module.
ESD sensitivity rating of SDIO interface pins is 1 kV (HMB according to JESD22-A114). Higher protection
level could be required if the lines are externally accessible and it can be achieved by mounting a very low
capacitance ESD protection (e.g. Tyco Electronics PESD0402-140 ESD), close to accessible points.
If the SDIO interface pins are not used, they can be left unconnected on the application board.
2.6.5.2
Guidelines for SDIO layout design
The SDIO
serial interface requires the same consideration regarding electro-magnetic interference as any other
high speed digital interface.
Keep the traces short, avoid stubs and avoid coupling with RF lines / parts or sensitive analog inputs, since the
signals can cause the radiation of some harmonics of the digital data frequency.
Consider the usage of low value series damping resistors to avoid reflections and other losses in signal integrity,
which may create ringing and loss of a square wave shape.
