LARA-R2 series - System Integration Manual
UBX-16010573 - R02
Objective Specification
System description
Page 41 of 148
1.9.1.4
UART and power-saving
The power saving configuration is controlled by the AT+UPSV command (for the complete description, see
u-blox AT Commands Manual
[2]). When power saving is enabled, the module automatically enters low power
idle-mode whenever possible, and otherwise the active-mode is maintained by the module (see section 1.4 for
definition and description of module operating modes referred to in this section).
The AT+UPSV command configures both the module power saving and also the UART behavior in relation to the
power saving. The conditions for the module entering low power idle-mode also depend on the UART power
saving configuration, as the module does not enter the low power idle-mode according to any required activity
related to the network (within or outside an active call) or any other required concurrent activity related to the
functions and interfaces of the module, including the UART interface.
Three different power saving configurations can be set by the AT+UPSV command:
AT+UPSV=0, power saving disabled (default configuration)
AT+UPSV=1, power saving enabled cyclically
AT+UPSV=2, power saving enabled and controlled by the UART
RTS
input line
AT+UPSV=3, power saving enabled and controlled by the UART
DTR
input line
The different power saving configurations that can be set by the +UPSV AT command are described in details in
the following subsections. Table 11 summarizes the UART interface communication process in the different
power saving configurations, in relation with HW flow control settings and
RTS
input line status. For more
details on the +UPSV AT command description, refer to
u-blox AT commands Manual
AT+UPSV HW flow control RTS line
DTR line
Communication during idle-mode and wake up
0
Enabled (AT&K3)
ON
ON or OFF
Data sent by the DTE are correctly received by the module.
Data sent by the module is correctly received by the DTE.
0
Enabled (AT&K3)
OFF
ON or OFF
Data sent by the DTE are correctly received by the module.
Data sent by the module is buffered by the module and will be correctly
received by the DTE when it is ready to receive data (i.e.
RTS
line will be ON).
0
Disabled (AT&K0)
ON or OFF
ON or OFF
Data sent by the DTE is correctly received by the module.
Data sent by the module is correctly received by the DTE if it is ready to receive
data, otherwise data is lost.
1
Enabled (AT&K3)
ON
ON or OFF
Data sent by the DTE is buffered by the DTE and will be correctly received by
the module when it is ready to receive data (when UART is enabled).
Data sent by the module is correctly received by the DTE.
1
Enabled (AT&K3)
OFF
ON or OFF
Data sent by the DTE is buffered by the DTE and will be correctly received by
the module when it is ready to receive data (when UART is enabled).
Data sent by the module is buffered by the module and will be correctly
received by the DTE when it is ready to receive data (i.e.
RTS
line will be ON).
1
Disabled (AT&K0)
ON or OFF
ON or OFF
The first character sent by the DTE is lost by the module, but after ~20 ms the
UART and the module are woken up: recognition of subsequent characters is
guaranteed only after the UART / module complete wake-up (after ~20 ms).
Data sent by the module is correctly received by the DTE if it is ready to receive
data, otherwise the data is lost.
2
Enabled (AT&K3)
ON or OFF
ON or OFF
Not Applicable: HW flow control cannot be enabled with AT+UPSV=2.
2
Disabled (AT&K0)
ON
ON or OFF
Data sent by the DTE is correctly received by the module.
Data sent by the module is correctly received by the DTE if it is ready to receive
data, otherwise data is lost.
2
Disabled (AT&K0)
OFF
ON or OFF
Data sent by the DTE is lost by the module.
Data sent by the module is correctly received by the DTE if it is ready to receive
data, otherwise data is lost.
