LEON-G100 / LEON-G200 - System Integration Manual
GSM.G1-HW-09002-G3
Preliminary
Design-In
Page 101 of 125
Reset
push button
OUT
IN
LEON-G100 / LEON-G200
12.6 k
1.88 V
22
RESET_N
OUT
IN
LEON-G100 / LEON-G200
12.6 k
1.88 V
22
RESET_N
Application Processor
FB2
FB1
C2
C1
ESD
Ferrite Bead
Ferrite Bead
Figure 56: RESET_N application circuits for ESD immunity test
Reference
Description
Remarks
ESD
Varistor for ESD protection.
CT0402S14AHSG - EPCOS
C1, C2
47 pF Capacitor Ceramic C0G 0402 5% 50 V
GRM1555C1H470JA01 - Murata
FB1, FB2
Chip Ferrite Bead for Noise/EMI Suppression
BLM15HD182SN1 - Murata
Rint
10 k
Ω
Resistor 0402 5% 0.1 W
Internal pull-up resistor
Table 35: Example of components as ESD immunity test precautions for the RESET_N line
SIM interface
Sensitive interface is the SIM interface (
VSIM
pin,
SIM_RST
pin,
SIM_IO
pin,
SIM_CLK
pin):
A 47 pF bypass capacitor (e.g. Murata GRM1555C1H470J) have to be mounted on the lines connected to
VSIM
,
SIM_RST
,
SIM_IO
and
SIM_CLK
to assure SIM interface functionality when an electrostatic discharge
is applied to the application board enclosure
It is suggested to use as short as possible connection lines at SIM pins