LILY-W1 series - System integration manual
UBX-15027600 - R09
Design-in
Page 22 of 64
C1 - Public
Figure 7: LILY-W132 PCB placement recommendation (dimensions are in mm)
A minimum clearance of 5 mm is recommended between the antenna and plastic parts of the casing.
If metal parts are used in the end product, a minimum of 10 mm clearance is required between the
antenna and those parts to avoid antenna detuning.
Recommended placement of LILY-W132 is on the PCB corner, as specified in Figure 7 (pin 11 of LILY-
W132 is on corner side of the host PCB). The host PCB’s ground plane shall be extended under the
antenna and multiple vias should be used to connect the module ground pins to the PCB, larger ground
on host side also increase antenna efficiency.
The host PCB’s ground plane can also be extended on the side of pin 11-20 with reduced impact on
antenna performance.
2.3
Supply interfaces
2.3.1
Module supply design
Though the GND pins are internally connected, it is recommended to connect all the available ground
pins to solid ground on the application board as a good (low impedance) connection to external ground
can minimize power loss and improve RF and thermal performance. LILY-W1 modules must be
sourced through
VCC
and
VCC_IO
pins with proper DC power supplies that comply with the
requirements summarized in Table 4.
Good connection of the LILY-W1 series module power supply pins with DC supply source is required
for accurate RF performance and schematic guidelines are summarized below:
•
All power supply pins must be connected to an appropriate DC source.
•
Any series component with Equivalent Series Resistance (ESR) greater than a few m
Ω
should be
avoided. Only exceptions to this rule are ferrite beads used for DC filtering, however those parts
should be used carefully to avoid instability of the DC/DC supply powering the module and are in
general not required.
•
A minimum bulk capacitance of 10
µ
F on
VCC
rail is required close to the module to help filter
current spikes from the RF section. The preferred choice is a ceramic capacitor with X7R or X5R
dielectric due to low ESR/ESL. Special care should be taken in the selection of X5R/X7R dielectrics
due to capacitance derating vs DC bias voltage.