LILY-W1 series - System integration manual
UBX-15027600 - R09
Design-in
Page 26 of 64
C1 - Public
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Verify with PCB manufacturer allowable stack-ups and controlled impedance dimensioning for
antenna traces and busses.
•
Verify that the power supply design and power sequence are compliant with LILY-W1 specification
(refer to section 1.3).
2.6.2
Component placement
•
Accessory parts like bypass capacitors should be placed as close as possible to the module to
improve filtering capability, prioritizing the placement of the smallest size capacitor close to
module pins.
•
Particular care should be taken not to place components close to the antenna area. The designer
should carefully follow the recommendations from the antenna manufacturer about the distance
of the antenna vs. other parts of the system. The designer should also maximize the distance of
the antenna to Hi-frequency busses like DDRs and related components or consider an optional
metal shield to reduce interferences that could be picked up by the antenna thus reducing the
module’s sensitivity.
2.6.3
Layout and manufacturing
•
Avoid stubs on high speed signals. Test points or component pads should be placed over the PCB
trace.
•
Verify the recommended maximum signal skew for differential pairs and length matching of
buses.
•
Minimize the routing length; longer traces will degrade signal performance. Ensure that maximum
allowable length for high speed busses is not exceeded.
•
Ensure to track your impedance matched traces. Consult early with your PCB manufacturer for
proper stack-up definition.
•
RF, analog and digital sections should have dedicated and clearly separated areas on the board.
•
No digital routing is allowed in the GND reference plane area of RF traces (ANT pin and Antenna).
•
Is strongly recommended to avoid digital routing beneath all layers of RF traces.
•
Ground cuts or separation are not allowed below the module.
•
Minimize the length of the RF traces as first priority. Then, minimize bus length to reduce potential
EMI issues from digital busses.
•
All traces (Including low speed or DC traces) must couple with a reference plane (GND or power),
Hi-speed busses should be referenced to the ground plane. In this case, if the designer needs to
change the ground reference, an adequate number of GND vias must be added in the area of
transition to provide a low impedance path between the two GND layers for the return current.
•
Hi-Speed busses are not allowed to change reference plane. If a reference plane change is
unavoidable, some capacitors should be added in the area to provide a low impedance return path
through the different reference planes.
•
Trace routing should keep a distance greater than 3w from the ground plane routing edge.
•
Power planes should keep a distance from the PCB edge sufficient to route a ground ring around
the PCB, the ground ring must then be connected to other layers through vias.
⚠
The heat dissipation during continuous transmission at maximum power can significantly raise
the temperature of the application base-board below the LILY-W1 series modules. Avoid placing
temperature sensitive devices close to the module and provide adequate grounding to transfer
the generated heat to the PCB.
2.7
Module footprint and paste mask
Figure 10 describes the pin layout for the LILY-W1 series module. The proposed land pattern layout
reflects the pin layout of the module. Both Solder Mask Defined (SMD) and Non Solder Mask Defined
(NSMD) pins can be used, however the following considerations apply:
