LENA-R8 series - System integration manual
UBX-22015376 - R02
Design-in
Page 80 of 116
C1-Public
Routing the USB pins to a connector, they will be externally accessible on the application device.
According to the EMC/ESD requirements of the application, an additional ESD protection device with
very low capacitance should be provided close to the accessible point on the line connected to this pin,
as described in
☞
ESD sensitivity rating of USB pins is 1 kV (HBM as per JESD22-A114F). Higher protection level
could be required if the lines are externally accessible and it can be achieved by mounting a very
low capacitance (i.e. less or equal to 1 pF) ESD protection (e.g. Littelfuse PESD0402-140 ESD
protection device) on the lines connected to these pins, close to accessible points.
The USB pins of the modules can be directly connected to the USB host application processor without
additional ESD protections if they are not externally accessible.
LENA-R8 series
D+
D-
GND
29
USB_D+
28
USB_D-
GND
USB DEVICE
CONNECTOR
D1 D2
VBUS
C1
17
VUSB_DET
LENA-R8 series
D+
D-
GND
29
USB_D+
28
USB_D-
GND
USB HOST
PROCESSOR
C1
17
VUSB_DET
VBUS
D3
0
Ω
TP
0
Ω
TP
0
Ω
TP
4
V_INT
33
USB_BOOT
4
V_INT
33
USB_BOOT
Short for
FW update
Short for
FW update
Figure 59: USB Interface application circuits
Reference
Description
Part number - manufacturer
C1
100 nF Capacitor Ceramic
Various Manufacturers
D1, D2, D3
Very Low Capacitance ESD Protection
PESD0402-140 - Littelfuse
Table 42: Component for USB application circuits
☞
If the USB interface pins are not used, they can be left unconnected on the application board, but
it is highly recommended to provide accessible Test-Points directly connected to the
VUSB_DET
,
USB_D+
,
USB_D-
and
USB_BOOT
pins, with a 0
series jumper on each line to detach the external
host processor for FW upgrade and/or for diagnostic purpose.
2.6.2.2
Guidelines for USB layout design
The
USB_D+
/
USB_D-
lines require accurate layout design to achieve reliable signaling at the
high-speed data rate (up to 480 Mb/s) supported by the USB serial interface.
The characteristic impedance of the
USB_D+
/
USB_D-
lines is specified by the Universal Serial Bus
Revision 2.0 specification
. The most important parameter is the differential characteristic
impedance applicable for the odd-mode electromagnetic field, which should be as close as possible to
90
differential. Signal integrity may be degraded if the PCB layout is not optimal, especially when
the USB signaling lines are very long.
Use the following general routing guidelines to minimize signal quality problems:
•
Route
USB_D+
/
USB_D-
lines as a differential pair.
•
Route
USB_D+
/
USB_D-
lines as short as possible.
•
Ensure the differential characteristic impedance (Z
0
) is as close as possible to 90
.
•
Ensure the common mode characteristic impedance (Z
CM
) is as close as possible to 30
.
•
Consider design rules for
USB_D+
/
USB_D-
as RF transmission lines, differential micro-strip or
buried stripline: avoid any stubs, abrupt change of layout, and route on clear PCB area.
•
Avoid coupling with any RF line or sensitive analog inputs, since the signals can cause the radiation
of some harmonics of the digital data frequency.