Unitron U-2200, Operation Manual

Page 1: ...U 2200 U 2200 U 2200 U 2200 U 2200 ...

Page 2: ...ione di Tiziano Garuti www 1000bit net CONTENTS CHAPTER 1 INTRODUCTION PAGE 1 CHAPTER 2 INSTALLATION PAGE 6 CHAPTER 3 U 2200 OPERATION PAGE 8 CHAPTER 4 VIDEO PAGE 17 CHAPTER 5 INPUT OUTPUT PAGE 24 APPENDIX PAGE 33 ...

Page 3: ...hich may aid you in use of various la ages and operating systems CHAPTER 1 INTRODUCTION The U 2200 system has two major parts Computer chassis and detached keyboard A coiled cable connects between them In this manual all descriptions of direction are based on your facing the machine in fiG 1 FIG On the front of the chassis as shown in fiG 1 2 there are a power indicator and a keyboard connector FI...

Page 4: ...hics High Resolution Graphics Text capacity 960 characters 24 lines 40 columns Character type 5x7 dot matrix Character_set Upper Lower case ASCII Character modes Nonnal Inverse Flashing Graphics capacity 1920 blocks Low Resolution in a 40 by 4S array 53760 dots High Resolution in a 2S0 by 192 array FIG 1 5 Power Pinout COMPUTERBOARD The U 2200 is a single board computer The computerboard Fig 1 6 i...

Page 5: ... outpUt devices to enhance the effect of programs especially in game programs This connector allows you to connect three one bit inputs four one bit outputs a data strobe and four analog inputs all of which can be managed by your programs KEYBOARD The U 22OO has a detached keyboard which connects to the computerboard with a coiled cable by a 15 pin female connector Most of your contact with U 2200...

Page 6: ...truction manuals GETTING STARTED The U 2200 is a dual processor computer system Both the 6502 and Z 80 microprocessors are supported for full compatible operation in one computer Turn the power on after set up You will hear a beep from the speaker The screen will show the message in FIG 2 1 6 UNIT RON DUAL PROCESSORS COMPUTER SYSTEM WITH AUTO BOOTING CP M CONNECT DISK DRIVE IN DRIVE 1 CONNECTOR AN...

Page 7: ... tRAM HRAM64K MUX ADDRESSING LANGUAGE CARD r CONTROL KEYBOARD I ROM I ZOO 6502 I ANALOG PERIPHERAL I O 12 u w w w w 0 a w U 0 a 0 Table 3 TimingSignllb Master oscillator output Used to derive other timing signals 7 159MHz timing signal 1 023 MHZ phase 0 system clock Complement to 1 Sometimes referred to as 2 in other literature 1 023 MHZ phase 1 system clock General purpose timing signal Twice the...

Page 8: ...dress is SFOOO SFFFF of bank O The Booter ROM is enabled by this two signals Hi when in Bank O Lo when is Bank 1 Address Bus Data Bus CE DE BANK O BANK 1 ROM1 SELECT ROM2 SELECT AO A12 00 07 Signals COAO BANK 1 SCOAF BANKO Address LANGUAGE CARD AREA The upper 16K of RAM appears as a Language card Soft switches are used to enable and disable ROM and RAM in this address range and are effective for w...

Page 9: ...tes an effective 2 80 clock rate of 2 041 MHZ Each type of achi e cycle contains one memory access period during J The read wr te signal IS synchronized ensuring that the write can only go tow during the time the 2 80 clock is high Because all address transitions from t e Z 80 occur when the clock is high they must all occur during l while the Video update access is occurring Thus each J has stabl...

Page 10: ... goes low during J when the address bJs contains an address between caoo and CFFF 50 12V 42 49 DO D7 40 41 DEViCE SELECT Phase 0 clock This signal becomes active low on a connector when the address bus holds an address between SCOnO and cOnF where n is the slot number plus B Buffered bidirectional data bus The data on these lines become valid 300 nsec into J on a write cycle and should be stable n...

Page 11: ...CREEN MEMORY The video display uses information in the system s RAM to generate its display The value of a single memory location controls the appearance of a particular fixed object on the screen This object can be a character two stacked blocks or a line of seven dots In Text and Low Resolution Graphics mode an area of memory containing 1024 locations is used as the source of the screen infonnat...

Page 12: ... The devices which decide between the various modes pages and mixes are called softswitches They are switches because they have two positions for example on or off text or graphics and they are called soft because they are controlled by the software of the computer A program can throw a switch by referencing the special memory location for that switch The data which are read from or written to the...

Page 13: ...LUTION GRAPHICS ILO RES MODE In the Low Resolution Graphics mode the U 2200 presents the contents of the same 1024 location of memory as for the Text mode but in a different format In this mode each byte of memory is displayed not as an ASCII character but as two blocks stacked one atop the other The screen can show an array of blocks 40 wide and 48 high each block can be white or black Since each...

Page 14: ...llows on the heels of the first at memory location number 16384 extending up to location number 24575 Each dot on the screen represents one bit from the picture buffer Seven of the eight bits in each byte are displayed on the screen Forty bytes are displayed on each line of the screen The least significant bit first bit of the first byte in the line is displayed on the left edge of the screen foll...

Page 15: ...ata Clear Keyboard Strobe 16384 16368 Decimal 49152 49168 location The keyboard sends seven biu of information which together form one character These seven bits along with another sjgnal which indicates when a key has been pressed are available to most programs as the contents of a memory location When you press a key on the keyboard the value in this location becomes 128 or greater and the parti...

Page 16: ...by themselves but only alter the codes produced by other keys The power li tlt at the lower left hand corner is an indicator lamp to show when the power is on This key is also a switch to set a flip flop for upper lower case characters DISK I O The U 2200 has two disk I O connectors on the rear panel The booter will boot CP M from the drive 1 connector Table 5 3 lists the pin out of the connector ...

Page 17: ... which were stored on cassette tape may be read back and used again 28 The input circuit takes a 1 volt peak to peakJ signal from the cassette recorder s EARPHONE jack and converts it into a string of ones and zeroes Each time the signal is applied to the input circlJit swings from positive to negative or vice versa the input circuit changes state if it was sending ones it will start sending zeroe...

Page 18: ...ional output called C040STROBE which is normally 5 Volts but will drop to zero volts for a duration of one half microsecond under the control of a machine lan 1Jage or BASIC program You can trigger this s rObe by referring to location number 49216 1632 or C04F Be aware th at If you perform a write operation to this location you will trigger the strobe tWice cassette out cassette In Flag inputs spe...

Page 19: ...puts These are standard 74LS series TTL inputs 6 6502 Assembly lan J lage Progr mming by lance A levonthal 7 Programming The Z BO by Rodnay Zaks 8 Softcard Manual 9 The CP M Handbook with MP M by Rodnay Zaks 5 6 7 10 1 8 12 15 9 16 C040 STROBE GCQ GC3 Gnd ANO AN3 NC A general purpose strobe This line nor mally hi1tl goes low during tjJJ of a read or write cycle to any address from C040 through C04...