A
A
B
B
C
C
D
D
E
E
4
4
3
3
2
2
1
1
A_CLK
A_DQM[0..1]
A_BA[0..1]
A_WE#
VREF
A_CKE
A_CLK#
A_DQ[0..31]
A_RA[0..11]
A_CAS#
A_DQS[0..3]
DV25
A_CS#
A_RAS#
F_A[0..21]
F_OE#
F_D[0..7]
PWR#
PCE#
GREEN+
GREEN-
BLUE+
BLUE-
RED+
VGASOG
RED-
VGAHSYNC#
VGAVSYNC#
SCL
SDA
DVIVSYNC
DVIHSYNC
DVIDE
DVIODCK
VI[0..23]
DV33A
DV18A
UP3_5
UP3_4
SCL
SDA
ICE
TxD
RxD
ATSC-SW
VREFN4
VREFP4
ANALOGVDD
AVCM
VOCM
VICM
ADCVDD0
REXTA
APLL_CAP
XTALI
XTALO
ADCPLLVDD1
ADCPLLVDD
VPLLVDD
APLLVDD
DACVREF
PWM2VREF
AUXTOP
AUXBOTTOM
SYSPLLGND
ADCGND
ADCVDD
DACFS
LVDDA
DACVDD
LVSSA
DACVSS
VPLLVSS
GPIO
CLK1+
PWM0
CLK1-
SC+
Y-
CB-
DACBCLK
DACMCLK
CB+
CVBS2-
CR+
CVBS2+
DACLRC
SC-
AOSDATA1
SY+
Y+
CVBS1+
SOY
CR-
CVBS1-
DOUT
SY-
OGO4
OGO5
PWM1
UP3_0
ORO4
RGBSEL
ORO6
OGO7
IR
UP3_1
OBO[0..7]
MPX2
OGO3
VGASCL
VGASDA
AP[0..3]
AN[0..3]
OGO0
OGO1
OGO2
UP1_3
UP1_2
UP1_4
UP1_5
ORO3
LVDS-SEQ
I2C_SW
FCLK
FCMD
ORO1
ORO2
ORO0
INT0#
AN7
AN6
AP5
AN5
AN4
AP4
CLK2-
AP7
CLK2+
AP6
CVBS1-
ADCVDD0
ADCPL
LV
DD1
ANALOGVDD
XTALO
VI5
AOSDATA3
A_DQ24
DV25
Tx
D
LVDS-SEQ
U
P
3_5
VPLLVSS
A_RA8
A_RA6
OGO5
F_A4
F_A8
A_DQ13
A_CAS#
A_DQ8
LVDDA
DACVREF
VGASCL
AP2
AVCM
SC-
VICM
CB-
RED-
APLL_CAP
VI10
DACLRC
ICE
ATSC-SW
VPLLVDD
A_CLK
A_RA2
OGO0
F_A3
F_D
4
SC+
Y+
CB+
GREEN-
SYSPLLGND
ANALOGVDD
VI14
GND
VI17
VI23
DVIVSYNC
DV18A
AOSDATA0
DACBCLK
A_DQ30
U
P
1_3
GND
LVSSA
DV18A
Rx
D
A_RA4
VREFP4
DV3
3A
F_A5
F_D
1
F_A15
A_DQ11
GND
CVBS0-
CR+
VI7
GND
OGO7
PW
M
1
A_DQ2
A_RA10
A_RA1
F_D
5
F_D
0
ORO1
CLK1+
F_A11
Y-
VI13
A_DQS2
A_DQ22
GND
F_A19
GND
DACFS
DV25
FC
M
D
REXTA
VPLLVSS
ADC_IN2
A_RAS#
ADCVDD0
VOCM
VI11
VI19
VI20
DOUT
PW
R#
AP0
PWM2VREF
DV3
3A
GND
GND
DV25
AUXBOTTOM
VPLLVDD
OBO1
F_A21
F_A14
ADCGND
SOY
CR-
VGAVSYNC#
SYSPLLGND
VI15
A_DQ26
A_DQ1
F_A2
OBO3
A_DQ5
A_DQ0
A_BA1
OBO2
DACVDD
DV18A
CR-SW
GND
ADCVDD0
SYSPLLGND
VI12
GPI
O
RGBSEL
F_D
6
AP1
AN0
ADC_IN3
A_DQ4
DV25
ADCVDD4
DACVSS
ORO4
ADC_IN1
F_A0
F_D
3
F_D
2
ORO2
ORO6
ORO3
A_DQ9
GND
ADCVSS4
SY-
MON0
MON1
SYSPLLGND
VI22
DVIODCK
DVIDE
A_DQ25
A_DQ21
GND
A_DQS1
U
P
1_2
A_DQ6
PW
M
0
A_DQ18
OBO5
OBO0
ADCVDD4
ADCVDD0
ADCVDD0
BLUE+
D
V
18A
VI18
VI21
DACMCLK
A_DQ29
GND
A_CKE
A_DQ7
A_DQ3
U
P
3_4
OGO1
GND
DACBCLK
CVBS0+
ADCGND
VGASOG
ADCGND
ADCPL
LV
DD
DVIHSYNC
A_DQ23
IR
U
P
3_0
DV1
8A
OBO4
F_A20
ORO0
VGASDA
A_DQ10
F_A12
CVBS2+
ADCGND
ADCGND
XTALI
SYSPLLGND
VI0
VI2
VI3
F_A10
U
P
1_4
F_O
E
#
DACVSS
VREFN4
GND
A_WE#
DV33A
SY+
GND
GND
A_DQM1
OBO7
A_DQ12
A_CS#
DACVDD
U
P
1_5
DV25
DACVSS
PCE#
DV18A
F_A16
F_A9
GND
CVBS2-
RED+
APLLVD
D
VI1
VI8
AOSDATA2
F_A1
ADCGND
DV3
3A
F_A6
F_D
7
DV25
GREEN+
VGAHSYNC#
SYSPLLGND
VI6
VI9
A_DQ27
A_DQ31
DV25
VREF
URST
#
A_DQ17
A_RA3
AN2
A_RA11
A_RA9
GND
A_RA5
GND
AP3
OGO2
OBO6
F_A7
DV1
8A
BLUE-
GND
VI16
A_DQ28
A_DQ20
DV18A
A_DQS0
A_RA7
OGO6
LVDDA
VPLLVSS
A_DQ14
A_DQ16
DACVDD
A_RA0
GND
A_CLK#
ADCVDD
LVSSA
AUXTOP
D
V
18A
ANALOGVDD
VI4
GND
AOSDATA1
DV33A
GND
A_DQS3
DV25
A_DQ19
A_DQM0
LVSSA
F_A18
U
P
3_1
I2C_SW
AN3
CLK1-
AN1
A_DQ15
GND
FC
LK
A_BA0
VPLLVDD
LVDDA
F_A17
GND
DV1
8A
F_A13
ADC_IN0
CVBS1+
MPX2
ADC_IN4
ADCVSS4
MPX1
ADCVDD4
ADCVSS4
REQUEST
#
READY#
GND
5VSB
DV18A
DV33A
URST#
READY#
REQUEST#
URST#
OGO6
CR-SW
OGO4
OGO3
INT0#
DV33A
DV18A
DV33A
5VSB
RxD
12
RED+
10
RED-
10
GREEN+
10
GREEN-
10
BLUE+
10
BLUE-
10
VGASOG
10
VGAHSYNC# 10
VGAVSYNC# 10
SY+
10
SC+
10
Y-
10
CVBS1+
10
Y+
10
CB+
10
SY-
10
CVBS2+
10
CR+
10
CB-
10
CR-
10
SOY
10
CVBS2-
10
CVBS1-
10
SC-
10
ORO4
7
OGO4
13
UP3_1
6
TxD
12
ATSC-SW
2
ANALOGVDD 3
SYSPLLGND 3
ADCVDD0
3
ADCGND
3
DACVREF
3
DACFS
3
VREFP4
3
VREFN4
3
VOCM
3
AVCM
3
VICM
3
REXTA
3
APLL_CAP
3
XTALO
3
XTALI
3
ADCPLLVDD 3
ADCPLLVDD1 3
APLLVDD
3
VPLLVDD
3
PWM2VREF 3
AUXTOP
3
AUXBOTTOM 3
ADCVDD
3
LVSSA
3
DACVSS
3
LVDDA
3
DACVDD
3
VPLLVSS
3
GPIO
1,2
OGO5
12
PWM1
11
OGO7
6
RGBSEL
10
ORO6
7,11
UP3_0
12
PWM0
12
IR
12
OBO[0..7]
12
CLK1-
12
CLK1+
12
AN[0..3]
12
AP[0..3]
12
AOSDATA1
11
DACLRC
11
DACMCLK
11
DACBCLK
11
SCL
1,6,11,12
SDA
1,6,11,12
A_DQS[0..3] 5
A_RA[0..11]
5
A_BA[0..1]
5
A_DQM[0..1] 5
A_DQ[0..31] 5
A_CLK
5
A_CLK#
5
A_CKE
5
A_RAS#
5
A_CS#
5
A_CAS#
5
A_WE#
5
F_A[0..21]
5
PCE#
5
F_OE#
5
PWR#
5
F_D[0..7]
5
DV25
5
VREF
5
DOUT
11
MPX2
10
VI[0..23]
6,13
DVIODCK
6,13
DVIDE
6,13
DVIHSYNC
6,13
DVIVSYNC
6,13
VGASCL
7
VGASDA
7
OGO0
6,13
OGO3
6,13
OGO1
6,13
OGO2
6,13
UP1_2
9
UP1_5
11
UP1_4
7
LVDS-SEQ
2
ORO3
6,7
ORO2
FCLK
12
FCMD
I2C_SW
12,13
INT0#
6
UP1_3
6,13
MPX1
8
ADCVDD4
3
ADCVSS4
3
DV33A
1,2,3,6,7,9,10,11,12
GND
1,2,3,5,6,7,8,10,12,13
5VSB
1,2,7,12
DV18A
2,3
URST#
13
READY#
13
REQUEST#
13
OGO6
CR-SW
2
ORO0
12
ORO1
12
MODEL
Sheet
REV:
of
CIRCUITY
PCB REV:
PCB FILE :
PCB P/ N:
ECN NO:
AmTRAN
TECHNOLOGY
APPROVED BY:
CHECKED BY:
SCH FILE :
DATE:
DESING BY:
MT8205BGA388
VIZIO P42 HDTV10A_MTK (3842-0122-0150)
4
13
AECN
PD42-M1.PCB
00
01
PD42LK-m0.DSN
0171-2272-2081
Monday, March 13, 2006
UP3_4 FOR S/W SCL
UP3_5 FOR S/W SDA
ALL RESISTORS 0402 WATT,5% UNLESS NOTED.
ALL CAPACITOR VALUES IN uF UNLESS NOTED.
ALL RESISTORS VALUES IN OHMS UNLESS NOTED.
NOTE : NC MEANS "NOT CONNECTED ON PCB BOARD"
ALL CAPACITORS 50 VOLT & 105"C UNLESS NOTED.
M= METAL 1%
ALL RESISTORS 25 VOLT IN .1uF UNLESS NOTED.
TP6
TP7
TP12
R33 4.7K
TP8
TP13
R96
0
CB19
0.1uF
TP10
1=3
2=4
SW1
SW-DIP4
1
2
3
4
TP14
C14
0.1u
TP3
R36
0
TP29
TP4
R35
1K
U26
AZ1085/adj
1085
ADJ/GND
1
OUT
2
IN
3
R37
0
TP9
MT8205
U9
MT8205
BGA388
A2P
P2
DVSS3
R11
ERO1
AD1
HI
GHA
6
AE9
HI
GHA
5
AF
9
HI
GHA
4
AE1
0
HI
GHA
3
AF
1
0
SC
L
0
AF
2
6
DV
DD18
AD
1
8
EBO7
V2
EBO6
V3
EBO5
W1
EBO4
W2
DVDD3I
AC9
EBO3
W3
EBO2
W4
CLK1P
N2
A4N
L1
CLK2P
H2
VREF
M4
LVDDC
M3
R
V4
HSYNCO
U2
G
U4
RWE#
U24
DQ10
V26
DQ9
V25
DQ8
W26
RAS#
T24
CAS#
T23
DVSS2
R15
DVDD2I
U23
DQ11
U25
DQ13
T25
ORO3
AE7
SD
A0
AE2
6
ORO6
AF
6
ORO2
AF
7
ORO1
AC
8
ORO0
AD
8
HI
GHA
7
AF
8
HI
GHA
1
AD
1
1
HI
GHA
0
AF
1
2
AD
0
AE1
5
AD
1
AD
1
5
DV
DD18
AC
1
9
AD
2
AC
1
5
AD
3
AF
1
6
AD
4
AE1
6
D
VSS3
R12
AD
7
AF
1
7
AD
5
AD
1
6
IO
A0
AD
1
7
IO
A3
AF
1
4
IO
A4
AF
1
3
IO
A5
AE1
3
IO
A6
AD
1
3
IO
A7
AC
1
3
DV
DD3I
AC
1
0
A1
6
AE8
A1
7
AC
1
7
IO
A2
0
AE1
1
D
VSS1
8
T12
IO
A2
1
AF
1
1
IO
AL
E
AE1
7
EBO1
Y1
OB
O1
AE3
D
VSS1
8
T11
OB
O0
AF
3
ERO5
AC1
OGO1
AC
6
DV
DD3
AD
9
ORO7
AE6
OGO0
AD
6
OBO6
AD4
ERO6
AB4
OBO5
AE1
OGO4
AD
5
ERO7
AB3
EGO1
AB1
EGO5
AA1
ERO4
AC2
OB
O4
AE2
OGO3
AE5
OGO2
AF
5
EGO0
AB2
EGO2
AA4
DVDD18
AC18
EGO4
AA2
DVSS18
P11
EGO7
Y3
VCLK
V1
OGO5
AC
5
EGO3
AA3
IO
C
S
#
AC
1
4
AUXVTOP
F3
VPLLVDD
G4
ADIN2
E2
ADCVSS
F2
RA2
N23
AUXVBOTTOM
G3
T
EST
P
B1
4
ADIN1
E3
ADIN0
E4
AF
C2
A3P
M2
DVSS2
R16
RA5
J24
RA6
K23
DVDD18
AA23
DVDD2
H23
DVSS18
R14
RA8
L23
RA9
L24
RA11
M23
RCLK
P26
ORO4
AD
7
DACVSSB
R3
SVM
T4
DACVSSC
N11
BGVDD
H4
BGVSS
K4
DLLVSS
K3
REXTA
J4
A4P
L2
A5N
K1
LVSSA
M12
A2N
P1
DACVDDB
P3
LVDDB
L4
REFP4
D1
REFN4
D2
ADCVDD
F1
DLLVDD
H3
RCLKB
P25
DVSS2
P15
RA3
M24
RA0
R26
RA1
N24
B
U3
DACVSSA
R4
DACVDDA
P4
ADCVDD4
D3
DQ18
M25
DQ17
M26
RA4
J23
RA10
P24
DQ16
N25
BA0
R24
DV
DD18
AD
1
9
UP
30
AE2
1
PR
ST
#
AC
2
1
UP
34
AD
2
2
UP
35
AC
2
2
WR#
AF
1
8
DQ3
AC26
DVDD2
W24
DQ2
AC25
RX
D
AE2
4
IR
AF
2
4
PW
M1
AC
2
3
PW
M0
AD
2
3
T
EST
N
A1
4
FC
IC
MD
AE2
2
FC
IC
LK
AF
2
2
DQ7
AA26
DVSS18
T16
DQ6
AA25
DVSS2
T14
DQ4
AB25
SD
A1
AB2
4
SC
L
1
AB2
3
SC
L
AF
2
5
UP
12
AE1
9
IN
T
0
#
AF
1
9
DV
DD3
AD
1
0
AVDD18
Y23
RVREF
G23
RD#
AE1
8
DQ14
T26
AVSS18
W23
DQS1
W25
DQ15
R25
UP
17
AF
2
1
DVDD2
V24
DVDD2
H24
SIF
C1
ADCVSS4
L11
ADIN4
D4
ADIN3
E1
PWM2VREF
F4
VPLLVSS
J3
A0N
T1
A0P
T2
LVDDA
L3
A1N
R1
CLK1N
N1
A3N
M1
A1P
R2
A5P
K2
A6N
J1
A6P
J2
UP
15
AD
2
0
OGO7
AE4
EGO6
Y4
LVSSB
M11
FS
N4
DACVDDC
N3
A7P
G2
CLK2N
H1
ERO0
AD2
OB
O2
AF
2
EBO0
Y2
OGO6
AF
4
RCS#
R23
BA1
P23
RA7
K24
CKE
N26
DVSS18
T13
DVSS2
T15
DQ12
U26
SD
A
AE2
5
FC
ID
A
T
AF
2
3
UP
31
AD
2
1
UP
13
AF
2
0
IO
A1
8
AE1
2
IOOE
#
AF
1
5
AD
6
AC
1
6
IO
A1
AD
1
4
ORO5
AC
7
DE
T3
ERO3
AC3
DVDD2
V23
UP
14
AE2
0
A7N
G1
LVSSC
N12
TX
D
AD
2
4
IC
E
AC
2
4
DQ0
AD25
DQS0
Y25
DQ5
AB26
D
VSS1
8
P1
2
VSYNCO
U1
ERO2
AC4
OBO7
AD3
OB
O3
AF
1
HI
GHA
2
AC
1
1
D
VSS1
8
P1
3
UP
16
AC
2
0
GP
IO
0
AE2
3
IO
W
R
#
AC
1
2
IO
A2
AE1
4
D
VSS3
R13
DQM0
Y26
IO
A1
9
AD
1
2
DQ1
AD26
DQ19
L26
DVDD18
AA24
DQ20
L25
DQ21
K26
DVSS2
P16
DQ22
K25
DQ23
J26
DQS2
J25
DQM1
H26
DVDD2
G24
DQS3
H25
DQ31
D25
DQ30
D26
DVSS2
N16
DQ29
E25
DVSS18
P14
DQ28
E26
DQ27
F25
DVDD2
F24
DQ26
F26
DQ25
G25
DQ24
G26
DVSS3
N15
AOMCLK
E24
AOLRCK
C25
AOBCK
C26
LIN
B24
AOSDATA3
B25
DVDD3I
F23
AOSDATA2
B26
AOSDATA1
A26
AOSDATA0
A25
DVDD18
Y24
HSYNC_DVI
A24
VSYNC_DVI
D24
DE_DVI
C24
V
C
LK
_DV
I
B2
3
VI2
3
A2
3
VI2
2
D23
VI2
1
C23
VI2
0
B2
2
VI1
9
A2
2
VI1
8
D22
VI1
7
C22
VI1
6
B2
1
D
VSS1
8
M1
6
VI1
5
A2
1
VI1
4
D21
VI1
3
C21
VI1
2
B2
0
D
VSS3
L16
VI1
1
A2
0
VI1
0
D20
VI9
C20
VI8
B1
9
VI7
A1
9
DV
DD18
E2
3
VI6
D19
VI5
C19
VI4
B1
8
VI3
A1
8
VI2
B1
7
VI1
A1
7
VI0
B1
6
D
M
PL
L
VSS
C18
DM
P
LLV
DD
C17
A
P
LLV
DD
D17
APL
L
VSS
D18
A
P
LL_CA
P
A1
6
XT
AL
VSS
M1
5
XT
AL
I
A1
5
XT
AL
O
B1
5
XT
AL
VD
D
C16
SYSPL
L
V
D
D
D16
SYSPL
L
VSS
L15
AD
C
P
L
L
VSS
M1
4
A
DCP
LLV
DD
C15
A
DCP
LLV
DD1
D15
AD
C
P
L
L
VSS1
L14
DV
DD
D14
D
VSS
N14
H
SYN
C
C14
VSYN
C
C13
RE
F
N
3
C12
RE
F
P
3
D12
AD
C
VSS3
C10
BP
A1
3
BN
B1
3
SO
G
D13
GP
A1
2
GN
B1
2
RP
A1
1
RN
B1
1
A
DCV
DD3
D8
MON
1
C11
MON
0
D11
RE
F
N
2
C9
RE
F
P
2
D9
AD
C
VSS2
D10
CRP
A8
CRN
B8
CB
P
A9
CB
N
B9
SO
Y
C8
YP
A1
0
YN
B1
0
A
DCV
DD2
C7
VIC
M
A7
VF
EVSS0
N13
VO
C
M
B7
VF
EVD
D
0
D7
RE
F
N
1
C6
RE
F
P
1
D6
AD
C
VSS1
M1
3
SYP
A6
SYN
B6
SC
P
A5
SC
N
B5
A
DCV
DD1
C5
RE
F
N
0
A4
RE
F
P
0
B4
AD
C
VSS0
L13
C
VBS0
P
A3
C
VBS0
N
B3
C
VBS1
P
A2
C
VBS1
N
B2
C
VBS2
P
A1
C
VBS2
N
B1
A
DCV
DD0
C4
AVC
M
D5
VF
EVSS1
L12
VFEVDD1
C3
R113
10K
R34
68K
TP28
TP5
TP11
Summary of Contents for VIZIO P42HDTV10A
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Page 27: ...CONFIDENTIAL DO NOT COPY Page 6 3 File No SG 0184 Main Board Block Diagram ...
Page 60: ...CONFIDENTIAL DO NOT COPY Page 8 28 File No SG 0184 ...
Page 61: ...CONFIDENTIAL DO NOT COPY Page 8 29 File No SG 0184 BLOCK DIAGRAM ...
Page 68: ...CONFIDENTIAL DO NOT COPY Page 8 36 File No SG 0184 Fig D READ TIMING WAVEFORMS ...
Page 69: ...CONFIDENTIAL DO NOT COPY Page 8 37 File No SG 0184 Fig E RESET TIMING WAVEFORM ...
Page 72: ...CONFIDENTIAL DO NOT COPY Page 8 40 File No SG 0184 Pin Configuration 400mil TSOP II x4 x8 x16 ...
Page 94: ...CONFIDENTIAL DO NOT COPY Page 9 2 File No SG 0184 3 5V DV50A CB15 4 3 3V DV33A U5 3 ...
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Page 101: ...CONFIDENTIAL DO NOT COPY Page 9 9 File No SG 0184 5 1 8V DV18 C64 6 1 25V 1V25_DDR C148 ...
Page 102: ...CONFIDENTIAL DO NOT COPY Page 9 10 File No SG 0184 7 1 2V DV12 C26 ...
Page 111: ...CONFIDENTIAL DO NOT COPY Page 10 7 File No SG 0184 TROUBLE OF THE DTV ...
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