Interface
Cir
cuit Descriptions
Force 2 Service Manual
5
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deactivate the RF output and to begin to respond to the new activation (or
de-activation) input. R27 and C29 provide time delay and moderate RF
filtering to this line.
An 8.192 MHz crystal oscillator generates the required clock signal for
89C54. This oscillator also provides the clock drive for the RF waveform
drive circuitry, giving a stable RF output frequency.
During RF T-on and T-off drive generation, U26 divides the crystal
frequency from 8.192 MHz to 510 KHz. One half of U18 serves as a toggle
flip-flop to divide the clock further to 255 KHz. Two analog gates of U20,
controlled by the microcontroller port P15, select the frequency of the RF
drive pulse trains. The microcontroller loads a 74LS165 parallel in serial
out shift, U6, with a pattern that corresponds to the grouping of RF drive
pulses for the desired mode of activation. Since the 8 bit shift register
cyclically loads itself while data shifts out, the drive frequency of
modulation is 255/8 = 31.88 KHz. An AND gate (U22) processes the
selected clock frequency with the serial output of the shift register U6 to
produce RFT0, the RF on drive. This generator does not use RFT1, the RF
off drive. R36-C41 compensate for timing skews on the clock generation
circuitry and provide a means for adjusting the RF output power.
To avoid RF interference problems, the microprocessor goes into an idle
mode when the generator is activated. A latch, U18A, sets when the
generator is activated and resets when the activation ends. The Q\ output
of this latch goes to an interrupt input, Port 33, of the microcontroller.
Resetting this latch awakens the microcontroller from its idle mode state,
allowing it to respond to the change in the activation status. The
occurrence of a REM alarm (except when Bipolar mode is activated) also
resets the latch. Enabling the generation of RF drive pulses requires the
inverse of the signal that awakens the microcontroller,
RF_EN/WAKEUP\. Consequently, RF drive trains and RF output can
only occur when the microcontroller is in the idle state.
A 74LS374 latch, U1, buffers Port 2 of the 89C54 microcontroller. Port 2
controls the RF enable and RF relay signals. The latch has an
asynchronous reset that forces the output signals to an inactive state
during the power up reset period.
Interface
The Interface board mounts vertically at the front panel shield. It contains
the patient circuit module functions: activation, output receptacle
selection and patient return contact quality monitoring. This board has
isolated, high voltage, patient connected circuitry, and you must use
exactly equivalent parts for component replacement.
The activation circuits comprise an isolated power source, comparators to
detect switch closure and optical couplers. The power source is two
flyback converters and toroid transformers. The handswitch circuits use
three comparators to sense active to cut, active to coag, cut to coag, and
active to cut to coag connections. These codes for cut and coag increase
power and reduce power, respectively. The remaining activation circuits
Summary of Contents for Force 2-2 PCH
Page 1: ...Service Manual Force 2 Electrosurgical Generator...
Page 10: ...Notes x Force 2 Service Manual...
Page 16: ...Notes 2 4 Force 2 Service Manual...
Page 32: ...Notes 4 10 Force 2 Service Manual...
Page 52: ...Typical Output Waveforms 6 12 Force 2 Service Manual Figure 6 5 Coag 300 Load...
