ProStar325 Service Manual
Publication date 8 May 2003
79
When the instrument is powered up, the outputs of the Xilinx are
all open circuit and have weak pullup resistors. The Xilinx need
to be configured by downloading them with code called
“Gateware”. When the microcontroller starts its boot sequence, it
downloads the gateware along serial port lines.
Xilinx (U11) sits directly on the microcontroller bus and Its
functions include -
Data transmission to/from Microcontroller
ADC/DAC timing, control, and accessing
Diagnostics functions
Front panel LED’s
Back panel I/O signals
Timing signals
Grating motor drive
ADC
is accessed through the Xilinx. A read from the ADC will
present the data onto the processor data bus. Signal processing
in the firmware is interrupt-driven. On completion of a
conversion, the ADC causes a signal interrupt (i.e. fresh data is
ready to read).
Stepper motor drive
for the grating is driven from a simple
port in the Xilinx. It is direct drive with current controlled
microstepping and provides accuracy of +/-1nm.
Lamp control and reporting
source lamp supplies are turned
on or off by the Xilinx according to user requirements. A logic low
on either the D
2
ON or VIS ON signals enables the respective
supply, although the D
2
lamp also requires a warm up period
prior to striking hence the need for the D
2
WARM UP signal. VIS
FILAMENT and D
2
ARC signals feed information back to the
processor to inform of any possible lamp failures.
The VISFITTED signal is pulled low by a wire loop on connector
J16. This signals to the processor that a Vis lamp option is fitted.
Digital I/O
for various internal and external signals is done by a
simple port on the Xilinx.
4.3.2
Non Volatile Data Storage
The detector stores the following data in non-volatile memory
(EEPROM and/or flash memory).This information is retained
when the detector is powered off.
The storage is in two sections, CMOS (battery backed) and
EEPROM.
4.3.2.1
CMOS
•
Lamp(s) hours of “on time”, resolution at least 0.1 hours
•
Date lamp(s) last changed
•
Dual path flow cell ratio and type
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