- In E3 mode, the line code is HDB3 or AMI
CLOCK SOURCE
: Configurable as follows:
-
Internal clock:
The clock for the transmitter is derived from the internal clock. The internal clock has an accuracy of +/-
3.5ppm conforming to G.812 recommendations.
-
External clock:
The clock for the transmitter is derived from a 1.5Mbit/s signal or 1.5MHz BITS clock present on the SMA
connector
-
From Rx
: The clock for the transmitter is derived from the received signal and the jitter of the incoming signal is suppressed.
-
Offset
: The clock for the transmitter is derived from internal clock generator. It can change the offset while measurements are
running. use numeric key to increase and decrease the frequency shift, up to 0.01 ppm. Frequency offset: ± 50 ppm with 1, 0.1,
0.01 ppm resolution
BALANCED:
Check when using the Bantam connectors. The transmitter output impedance will be set to 100ohms. The Primary
test port is "1" on top panel. If unchecked, the unit will assume that testing is taking place on the 75 ohm unbalanced BNC Tx
connector for E1 mode.
7.2.3 Tx Setup > Payload
Tapping the Payload box opens the Tx Payload Setup screen.
RATE:
In DS1 (1.544Mbit/s) mode, the options are 1.544M or Fractional DS1(Nx64 or Nx56) where:
- 1.544 M: Configures the transmitter for full rate testing at 1.544Mbit/s
- Fractional DS1 (Nx64 or Nx56): Configures the transmitter for fractional testing using N or M 64kbit/s or 56kbit/s timeslots.
(Contiguous or non-Contiguous timeslots).
In DS3 (45 Mbit/s) mode, the option are 45M or 1.544M Mux (DS3/DS1 Mux) or Fractional DS1Mux where:
- 45 M: Configures the transmitter for full rate testing at 45Mbit/s
- 1.544 M (DS3/DS1 Mux): Configures the transmitter for full rate testing at 45Mbit/s signal with DS1 payloads (1 to 28 channels)
- Fractional DS1 Mux: Configures the transmitter for full rate testing at 45Mbit/s signal with DS1 payloads (1 to 28 channels) for
fractional testing using N or M64kbit/s or 56kbit/s timeslots. (Contiguous or non-Contiguous timeslots).
TX150 e-Manual D07-00-023 Rev A02
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