Physical Description
VL-EPMs-U1 Reference Manual
9
S
TACKING
R
ESTRICTIONS
The VL-EPMs-U1 can be used with any SUMIT-enabled VersaLogic CPU board, though some
restrictions apply, as described below.
VL-EPMs-21 and VL-EPICs-36 Restrictions
The following restrictions apply when using the VL-EPMs-21 or VL-EPICs-36:
A maximum of two VL-EPMs-U1 boards are supported in the stack.
When two VL-EPMs-U1 boards are in the stack, one must be configured with a base
address of 0x4E. The other board must be configured to 0x162E or 0x164E. Address
0x2E is reserved for the CPU board's Super I/O.
I/O base address availability is limited. Generally, each base address option is port
specific. Eighteen I/O base addresses are available to all ports, but address options for a
particular port are limited to three.
Interrupts can be shared among serial ports on the same VL-EPMs-U1 board, but not
shared among serial ports on different boards (that is, serial ports originating from
different super I/O chips).
The serial ports on the VL-EPMs-U1 must be added manually in Windows using the Add
Hardware Wizard and the Device Manager. The module is not plug-and-play.
BIOS console redirection to VL-EPMs-U1 serial ports cannot be activated using the
Ctrl-C keyboard combination. However, the OS can redirect the console to VL-EPMs-
U1 ports.
Additional VL-EPICs-36 Restrictions
The following restrictions pertain to the VL-EPICs-36 only:
A maximum of three I/O ranges can be allocated to VL-EPMs-U1 serial ports. You
should configure the ports to use contiguous I/O space to best utilize these decode
ranges. The following base addresses are exempt from this restriction: 3F8, 2F8, 208,
and 200.
Including on-board serial ports, a maximum of 16 ports can be configured. The system
will display a warning if the BIOS cannot allocate enough I/O space.
