Last update: 2021/10/06 23:13
ffc:100
https://www.vescent.com/manuals/doku.php?id=ffc:100
https://www.vescent.com/manuals/
Printed on 2021/10/08 00:37
Fig. 9: Select PZT Gain
FPGA Control
The SLICE-FPGA dual-channel Offset Phase Lock Servo can be used to phase lock ƒ
CEO
to a reference
(TBD) and ƒ
opt
to a reference laser such as the Rio Planex.
If you have not already done so, install
and the
for controlling the SLICE-FPGA
dual Offset Phase Lock Servo.
Software Startup
Open a WinPython command window and navigate to the folder “GUI and Firmware”.
1.
Start the SLICE-FPGA control GUI by typing “python XEM_GUI3_VPv4.py”,
2.
Fig. 10: Start FPGA GUI from Terminal
A start-up menu should appear (
). Make sure “superlaserland_v12.bit” is selected and
3.
select an appropriate clock option. Press OK.
