CONFIDENTIAL – DO NOT COPY
Page 8-
47
File No. SG-0184
Read Command
Writes
Write bursts are initiated with a Write command, as shown in timing figure
Write Command
on
following: The starting column and bank addresses are provided with the Write command, and
Auto Precharge is either enabled or disabled for that access. If Auto Precharge is enabled, the
row being accessed is precharged at the completion of the burst. For the generic Write
commands used in the following illustrations, Auto Precharge is disabled.
During Write bursts, the first valid data-in element is registered on the first rising edge of DQS
following the write command, and subsequent data elements are registered on successive edges
of DQS. The Low state on DQS between the Write command and the first rising edge is known
as the write preamble; the Low state on DQS following the last data-in element is known as the
write postamble. The time between the Write command and the first corresponding rising edge of
DQS (tDQSS) is specified with a relatively wide range (from 75% to 125% of one clock cycle), so
most of the Write diagrams that follow are drawn for the two extreme cases (i.e. tDQSS(min) and
tDQSS(max)). Timing figure
Write Burst (Burst Length = 4)
on page 33 shows the two extremes
of tDQSS for a burst of four. Upon completion of a burst, assuming no other commands have
been initiated, the DQs and DQS enters High-Z and any additional input data is ignored.
Summary of Contents for P42HDTV10A - 42" Plasma TV
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Page 68: ...CONFIDENTIAL DO NOT COPY Page 8 36 File No SG 0184 Fig D READ TIMING WAVEFORMS...
Page 69: ...CONFIDENTIAL DO NOT COPY Page 8 37 File No SG 0184 Fig E RESET TIMING WAVEFORM...
Page 72: ...CONFIDENTIAL DO NOT COPY Page 8 40 File No SG 0184 Pin Configuration 400mil TSOP II x4 x8 x16...
Page 94: ...CONFIDENTIAL DO NOT COPY Page 9 2 File No SG 0184 3 5V DV50A CB15 4 3 3V DV33A U5 3...
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Page 101: ...CONFIDENTIAL DO NOT COPY Page 9 9 File No SG 0184 5 1 8V DV18 C64 6 1 25V 1V25_DDR C148...
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