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EMX-75XX Index
37
T
HEORY OF
O
PERATION
This section provides an overview of how the EMX-7519 works. The figure below shows
illustrates this process.
Backplane Signals
EMX-7519
FPGA
Latch
Latch
Clamp Voltage
Selection
(V
CLAMP
)
Emulation
Mode Select
Output
FET
Over-
Current
Detect
Internal Voltage (3.7 V, 5V, 12 V, 24 V)
V
ctrl
DATA_Px_Chx
User Voltage
V
ctrl
Backplane Connector
I/O Latch Data
&
Control
GND_S
DataOut_Px_Chx
GND_S
Front Panel Connector
F
IGURE
2-19:
EMX-7519
B
LOCK
D
IAGRAM
Overview
The EMX-7519 supports a static mode where user-driven software commands execute writing
data channels on a per port basis. Each port can be programmed for polarity. The default polarity
is normal. Ports also need a voltage reference before data can be written; this voltage is used for
pulling up open drain data lines. No voltage should be applied on data lines before voltage
selection and during voltage configuration process. User can select a voltage from 3.3 V, 5 V,
12 V or 24 V provided on the module or supply a voltage through front panel connector, to be
used as V
CLAMP
. By default, no voltage is selected and data lines are floating. There is also an
option of configuring a port’s voltage setting as either TTL or Low Voltage emulation. In TTL
emulation setting, open drain lines are pulled up to 5 V and have a sourcing capability of 4 mA,
whereas in Low Voltage (LV) option the pull-up voltage is 3.3 V with 4 mA drive strength.
When doing a write, data written to a port set for output updates data on that port.
When a port’s direction is output, data is driven by the DO on the corresponding channels and no
user voltage should be applied on those channels.
TTL and LV emulation voltage selection is only applicable when port’s direction is output.
