35
new memory that
has a different
performance
rating.
Configure DRAM Timing
by SPD
Disabled / Enabled
SPD (Serial
Presence Detect) is
located on the
memory module.
The BIOS can read
information coded
in SPD during
system boot up.
Memory hole
Disabled/15MB-16MB Default value is
'Disabled'. This
value prevents a
memory hole being
reserved in system
memory between
15 MB – 16 MB for
ISA adapter ROMs.
If '15 MB-16 MB',
this value reserves
the area of system
memory between
15 MB – 16 MB for
ISA adapter ROMs.
When this area is
reserved, it cannot
be cached.
Internal Graphics Mode
Select
Enabled, 1MB
Enabled, 8MB
Select the amount
of system memory
used by the
Summary of Contents for WLP-7821-17
Page 9: ...IX Version Change History Date Version Description Remark 2011 04 29 V1 0 First release...
Page 20: ...9 System View WLP 7821 17M RES CAP Panel Mount Outline Drawing...
Page 21: ...10 WLP 7821 17M RES CAP Openframe Outline Drawing...
Page 22: ...11 WLP 7821 19M RES CAP Panel Mount Outline Drawing...
Page 23: ...12 WLP 7821 19M RES CAP Openframe Outline Drawing...
Page 24: ...13 I O connectors Remarks WLP 7821 series PCMCIA slot is removed...
Page 25: ...14 Mount Installation For Open frame and Panel mount...