101019
OPERATIONS MANUAL PPM-LX800-G
10
Digital I/O
The PPM-LX800-G has 16 open collector digital I/O bits with 10K pullup with a default
base address of 120H. These 16 lines are capable of fully latched event sensing with
sense polarity being software programmable. A 50-pin connector allows for easy mating
with industry standard I/O racks.
J4
, shown below, is the digital I/O connector on the
J4
1 o o 2
3 o o 4
5 o o 6
7 o o 8
9 o o 10
11 o o 12
13 o o 14
15 o o 16
17 o o 18
19 o o 20
21 o o 22
23 o o 24
25 o o 26
27 o o 28
29 o o 30
31 o o 32
33 o o 34
35 o o 36
37 o o 38
39 o o 40
41 o o 42
43 o o 44
45 o o 46
47 o o 48
49 o o 50
NC
NC
NC
NC
NC
NC
NC
NC
Port 1 Bit 7
Port 1 Bit 6
Port 1 Bit 5
Port 1 Bit 4
Port 1 Bit 3
Port 1 Bit 2
Port 1 Bit 1
Port 1 Bit 0
Port 0 Bit 7
Port 0 Bit 6
Port 0 Bit 5
Port 0 Bit 4
Port 0 Bit 3
Port 0 Bit 2
Port 0 Bit 1
Port 0 Bit 0
+5V
NC
NC
NC
NC
NC
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
Digital I/O VCC Enable
The I/O connectors can p5V to an I/O rack or for miscellaneous purposes by jumpering
J1
. When
J1
is jumpered (7-8), +5V is provided at pin 49 of
J4
. It is the user’s responsibility to
limit current to a safe value (less than 400 mA) to avoid damaging the CPU board.
7 5 3 1
o o o o
o o o o
8 6 4 2
J1
+5V is provided at pin 49 of
J4
7-8
No Power at Pin 49 of
J4
(default)
7 8
