WIZ127SR User’s Manual
2
2.
Hardware Specifications
2.1.
Pin Assignment and Description
Figure 1 Pin Assignment
Pin
Location
Pin name
Description
I/O
Attribute
J1.1
VDD3V3
3.3V Power Supply
J1.2
RESET
Reset (Active High)
Input
-
J1.3
GND
Ground
J1.4
UART1_TX
TX Data Output for UART1
We
recommend
to
add
external pull-up resistor on
UART1_TX.
Output
J1.5
UART1_RTS
Request To Send for UART1
Output
J1.6
PB0
GPIO pin
Input/Output
CMOS/TTL/5V tolerant Input
J1.7
GND
Ground
J1.8
UART1_RX
RX Data Input for UART1
Input
J1.9
UART1_CTS
Clear To Send for UART1
Input
J1.10
PB1
GPIO pin
Input/Output
CMOS/TTL/5V tolerant Input
J1.11
GND
Ground
J1.12
(*)
High: Not connected
Low: Connected
Input/Output
CMOS/TTL/5V tolerant Input
WIZ127SR check whether this
pin is asserted low as input pin
during booting If it is low,
WIZ127SR enter into Hardware
configuration mode. Otherwise,
It enters into normal mode
J2.1
VDD3V3A
Analog 3.3V Output
J2.2
RXIN
Ethernet Differential Input-
Input
-
J2.3
RXIP
Ethernet Differential Input+
Input
-
J2.4
GND
J2.5
TXON
Ethernet Differential Output-
Output
-
J2.6
TXOP
Ethernet Differential
Output
-
J2.7
GND
Ground
J2.8
LINKLED_M0
Ethernet Link LED
Output
-
J2.9
PB5
GPIO pin
Input/Output
CMOS/TTL/5V tolerant Input
PB0
PB1
VDD3V3A
RXIP
RXIN
TXOP
TXON
UART1_RTS
LINKLED_M0
PB5
UART1_TX
STATUS1
UART1_CTS
UART1_RX
SPDLED_M1
FDXLED_M2
VDD3V3
VDD3V3
STATUS2
PB11
UART2_RX
UART2_TX
UART2_RTS
UART2_CTS
PC15
PB15
PB14
PB13
PB12
PC14
J3
2.0mm HEADER 12x1
1
2
3
4
5
6
7
8
9
10
11
12
J1
2.0mm HEADER 12x1
1
2
3
4
5
6
7
8
9
10
11
12
J2
2.0mm HEADER 12x1
1
2
3
4
5
6
7
8
9
10
11
12
RESET