FusionServer CH242 V5 Compute Node
Technical White Paper
4 Logical Structure
2022-08-12
12
4
Logical Structure
Figure 4-1
CH242 V5 logical structure
⚫
The server supports two or four Intel
®
Xeon
®
Scalable processors.
⚫
The server supports up to 48 memory modules.
⚫
The CPUs (processors) interconnect with each other through three UPI links at a speed
of up to 10.4 GT/s.
⚫
The mezzanine cards connect to the processors through PCIe buses to provide service
ports.
⚫
The Platform Controller Hub (PCH) has a built-in MAC chip and provides two 10 Gbit/s
ports.
⚫
The storage module, consisting of a RAID controller card and a drive backplane,
connects to the CPUs through PCIe buses.
⚫
The iBMC provides device management functions, such as compute node power control,
slot number acquisition, PSU detection, and KVM over IP.