HDMI 1.4/2.0 TX Subsystem
73
PG235 October 4, 2017
Chapter
5:
Example Design
xsdb% target -set 3
7. Download the software .elf to the FPGA.
xsdb% dow ./v_hdmi_tx_ss_0_ex.sdk/<name of bsp>_xhdmi_example_1/
Debug/<name of bsp>_xhdmi_example_1.elf
8. Run the software.
xsdb% stop
xsdb% rst
xsdb% con
9. Exit the XSDB command prompt.
xsdb% exit
Note:
TB-FMCH-HDMI4K is not needed for ZCU102 example designs.
IMPORTANT:
When using the TB-FMCH-HDMI4K example design with the KCU105 board, you must set
the FMC VADJ_1V8 Power Rail before programing the FPGA with bitstream generated from Example
Design Flow.
KCU105 Board FMCH VADJ Adjustment
shows the steps on how to set the VADJ power rail
when using KCU105 board. For more details about KCU105 Board, to KCU105 Board User Guide
.
KCU105 Board FMCH VADJ Adjustment
The KCU105 board system controller must apply power to the VADJ power rail for the HDMI
2.0 FMC card (TB-FMCH-HDMI4K). Most new boards are per-programmed and should be
detected. The VADJ is powered when the DS19 LED (located near the power switch on the
KCU105 board) is ON.
If an older version KCU105 board is used, or the board is not properly programmed upon
receiving, you must manually set the VADJ power rail to 1.8V for the HDMI 2.0 FMC card
prior to bitstream configuration.
Perform these steps to set the VADJ power rail through the UART terminal are:
1. Connect a USB cable between the USB UART connector of the KCU105 board and a PC
running Windows.
2. Use the Windows Device Manager to determine which virtual COM port is assigned to
the UART for the Zynq-7000 AP SoC system controller and which is assigned to the UART
for the UltraScale FPGA. In the list of COM ports in the Device Manager window, the
enhanced COM port associated with the CP210x, is the one connected to the KCU105
board system controller and the standard COM port is the one connected to the FPGA
UART.