HDMI 1.4/2.0 TX Subsystem
84
PG235 October 4, 2017
Appendix
B:
Debugging
Reference Boards
Various Xilinx development boards support the HDMI 1.4/2.0 Transmitter Subsystem. These
boards can be used to prototype designs and establish that the subsystem can
communicate with the system.
• 7 series FPGA evaluation board
°
KC705
• UltraScale FPGA evaluation board
°
KCU105
• Zynq-7000 All Programmable SoC evaluation board
°
ZC706
• Ult FPGA evaluation board
°
ZCU102
Hardware Debug
Hardware issues can range from link bring-up to problems seen after hours of testing. This
section provides debug steps for common issues. The Vivado debug feature is a valuable
resource to use in hardware debug. The signal names mentioned in the following individual
sections can be probed using the debug feature for debugging the specific problems.
General Checks
• Ensure that all the timing constraints and all other constraints were met during
implementation.
• Ensure that all clock sources are active and clean.
• If using MMCMs in the design, ensure that all MMCMs have obtained lock by
monitoring the
locked
port.
• If your outputs go to 0, check your licensing.
°
User LEDs (KC705/KCU105/ZC706/ZCU102)
°
LED0 - HDMI TX subsystem lock (when HDMI Example Design is used)
°
Use debug port to check if there are link data coming from Video PHY Controller
core.
°
Refer to the
Debugging
Appendix in
Video PHY Controller LogiCORE IP Product
Guide
(PG230)
, and ensure there is no problem with clocking issues.
• The system flow/state information from the event logs by UART option
z
.