KC724 GTX Transceiver Characterization Board
45
UG932 (v2.2) October 10, 2014
Appendix B
Master Constraints File Listing
The KC724 board master Xilinx design constraints file (XDC) template provides for
designs targeting the KC724 Kintex-7 FPGA GTX Transceiver Characterization Board. Net
names in the constraints listed in this appendix correlate with net names on the KC724
board schematic. Identify the appropriate pins and replace the net names with the net
names in the user RTL. See the
Vivado Design Suite User Guide, Using Contstraints
(UG903)
for more information.
The FMC connectors JA2 and JA3 are connected to VCCO_HP and VCCO_HR I/O banks,
respectively. Because each FMC card implements customer-specific circuitry, the FMC
bank I/O standards must be uniquely defined by each customer.
Note:
Kintex-7 FPGA KC724 Characterization Kit website
for the latest release of the XDC
file.
KC724 Board XDC Listing
#FMC1
set_property PACKAGE_PIN W19 [get_ports FMC1_PRSNT_M2C_L]
set_property IOSTANDARD LVCMOS18 [get_ports FMC1_PRSNT_M2C_L]
set_property PACKAGE_PIN AE10 [get_ports FMC1_CLK0_M2C_P]
set_property IOSTANDARD LVCMOS18 [get_ports FMC1_CLK0_M2C_P]
set_property PACKAGE_PIN AF10 [get_ports FMC1_CLK0_M2C_N]
set_property IOSTANDARD LVCMOS18 [get_ports FMC1_CLK0_M2C_N]
set_property PACKAGE_PIN AD18 [get_ports FMC1_CLK1_M2C_P]
set_property IOSTANDARD LVCMOS18 [get_ports FMC1_CLK1_M2C_P]
set_property PACKAGE_PIN AE18 [get_ports FMC1_CLK1_M2C_N]
set_property IOSTANDARD LVCMOS18 [get_ports FMC1_CLK1_M2C_N]
#FMC1 LA
set_property PACKAGE_PIN AD12 [get_ports FMC1_LA00_CC_P]
set_property IOSTANDARD LVCMOS18 [get_ports FMC1_LA00_CC_P]
set_property PACKAGE_PIN AD11 [get_ports FMC1_LA00_CC_N]
set_property IOSTANDARD LVCMOS18 [get_ports FMC1_LA00_CC_N]
set_property PACKAGE_PIN AE11 [get_ports FMC1_LA01_CC_P]
set_property IOSTANDARD LVCMOS18 [get_ports FMC1_LA01_CC_P]
set_property PACKAGE_PIN AF11 [get_ports FMC1_LA01_CC_N]
set_property IOSTANDARD LVCMOS18 [get_ports FMC1_LA01_CC_N]
set_property PACKAGE_PIN AA12 [get_ports FMC1_LA02_P]
set_property IOSTANDARD LVCMOS18 [get_ports FMC1_LA02_P]
set_property PACKAGE_PIN AB12 [get_ports FMC1_LA02_N]
set_property IOSTANDARD LVCMOS18 [get_ports FMC1_LA02_N]
set_property PACKAGE_PIN AA8 [get_ports FMC1_LA03_P]
set_property IOSTANDARD LVCMOS18 [get_ports FMC1_LA03_P]
set_property PACKAGE_PIN AB8 [get_ports FMC1_LA03_N]
set_property IOSTANDARD LVCMOS18 [get_ports FMC1_LA03_N]
set_property PACKAGE_PIN AB9 [get_ports FMC1_LA04_P]
