40
KC724 GTX Transceiver Characterization Board
UG932 (v2.2) October 10, 2014
Chapter 1:
KC724 Board Features and Operation
lists the power supply voltages for the HPC connectors.
XADC
Callout
7 series FPGAs provide an analog front end (XADC) block. The XADC block includes a
dual 12-bit, 1 MSPS analog-to-digital convertor (ADC) and on-chip sensors. See
7 Series
FPGAs and Zynq-7000 All Programmable SoC XADC Dual 12-Bit 1 MSPS Analog-to-Digital
Converter User Guide
(UG480)
for details on the capabilities of the analog front end.
The KC724 board supports the internal FPGA sensor measurement capabilities of the
XADC. Internal measurements of the die temperature, VCCINT and VCCAUX can be
monitored using the ChipScope™ Pro tool. The KC724 board provides two ways of setting
the XADC reference voltage:
•
Jumper pins 1-2 (REG) on J142:
In this configuration, an onboard,
low-temperature-coefficient 1.25V reference (U45, Texas Instruments part number
REF3012AIDBZT) is connected to XADC VREFP.
•
Jumper pins 2-3 (AGND) on J142:
In this configuration, the FPGA's XADC uses an
internal reference circuit.
Note:
A jumper should be installed in one of the two positions during normal operation.
U23.6
FMC1_FMC2_TMS
D33
Notes:
1. This signal is not directly connected to the FPGA. The value in the leftmost
column represents the device and pin the signal is connected to. For example,
U39.10 = U39 pin 10.
Table 1-19:
Power Supply Voltages for the HPC Connector
Voltage
Supply
Allowable Voltage Range Number
of Pins
I
MAX
(Amps)
Tolerance
Maximum
Capacitive Load
FMC1
FMC2
V
ADJ
VCCO_HP
VCCO_HR
4
4
±5%
1,000 µF
3P3V
AUX
3.3V
1
0.020
±5%
150 µF
3P3V
3.3V
4
3
±5%
1,000 µF
12P0V
12V
2
1
±5%
1,000 µF
Table 1-18:
VITA 57.1 FMC2 HPC Connections at JA2
(Cont’d)
U1 FPGA Pin
Net Name
FMC Pin
