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Virtex-6 FPGA Connectivity Kit Getting Started
UG664 (v1.4) July 6, 2011
Getting Started with the Connectivity Targeted Reference Design Demo
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One USB stick containing reference designs, documentation, and demos
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Operating System: Fedora 10 LiveCD
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Virtex-6 FPGA Connectivity Kit documentation:
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Welcome letter
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Hardware setup guide
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This Getting Started Guide
What is Available Online
Refer to the Xilinx website for this information:
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License for ISE Design Suite: Embedded Edition
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http://www.xilinx.com/getproduct
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http://www.xilinx.com/tools/faq.htm
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Connectivity Kit home page with documentation and reference designs:
http://www.xilinx.com/v6connkit
This home page provides information on:
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USB stick contents (the current version of the data on the USB stick is available
here)
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Schematics, Gerber, and board bill of materials (BOM)
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Additional detailed documentation
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Technical Support
Getting Started with the Connectivity Targeted Reference Design
Demo
The Virtex-6 FPGA Connectivity Kit comes with a pre-built demonstration of the
Virtex-6 FPGA Connectivity Targeted Reference Design (TRD) available on Platform Flash.
The demo can be run before any additional tools are installed for an overview of the
features of the ML605 Evaluation Board using a connectivity targeted reference design in
the Virtex-6 LX240T FPGA.
Board and Connectivity Targeted Reference Design Features
The Virtex-6 FPGA Connectivity TRD (see
demonstrates the main integrated
components in a Virtex-6 FPGA. The Integrated Endpoint Block for PCI Express and GTX
transceivers work together in an application with additional IP cores, such as a Northwest
Logic Packet DMA engine for the PCI Express interface, XAUI LogiCORE™ IP, and
Memory controller IP generated using the Memory Interface Generator (MIG).
Summary of Contents for Virtex-6 FPGA
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