Spartan-3A DSP 3400A Edition User Guide
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35
UG498 (v2.2) November 17, 2008
Spartan-3A DSP 3400A Edition Board Hardware
R
31.
User-defined DIP Switches
Eight general-purpose, active-high DIP switches (S3) are connected to the user I/O
pins of the FPGA.
32.
User-defined LEDs
Eight general-purpose, active-high LEDs (DS10-DS17) are connected to the user I/O
pins of the FPGA.
Table 1-22:
User-defined DIP Switch FPGA Pin Assignments
Switch No.
FPGA Pin
Description
1
R26
FPGA_DIP_SW0
2
R25
FPGA_DIP_SW1
3
T23
FPGA_DIP_SW2
4
R24
FPGA_DIP_SW3
5
T18
FPGA_DIP_SW4
6
R22
FPGA_DIP_SW5
7
R21
FPGA_DIP_SW6
8
R20
FPGA_DIP_SW7
Table 1-23:
User-defined LED FPGA Pin Assignments
LED No.
FPGA Pin
Description
1 (DS10)
W23
GPIO_LED_0
2 (DS11)
V22
GPIO_LED_1
3 (DS12)
V25
GPIO_LED_2
4 (DS13)
V24
GPIO_LED_3
5 (DS14)
V23
GPIO_LED_4
6 (DS15)
U23
GPIO_LED_5
7 (DS16)
U22
GPIO_LED_6
8 (DS17)
T24
GPIO_LED_7
BUS_ERROR_1 (DS22)
C26
BUS ERROR LED 1
BUS_ERROR_2 (DS23)
Y24
BUS ERROR LED 2
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