A
1
2
3
4
5
6
7
8
9
10
B
C
D
E
F
G
H
I
J
K
L
M
N
61
DIGITAL 1/3
CD-S2100
SCHEMATIC DIAGRAMS
★
All voltages are measured with a 10MΩ/V DC electronic voltmeter.
★
Components having special characteristics are marked
⚠
and must be replaced
with parts having specifications equal to those originally installed.
★
Schematic diagram is subject to change without notice.
● 電圧は、内部抵抗 10MΩの電圧計で測定したものです。
● ⚠印のある部品は、安全性確保部品を示しています。部品の交換が必要な場合、
パーツリストに記載されている部品を使用してください。
● 本回路図は標準回路図です。改良のため予告なく変更することがあります。
3.3
3.3
8.2
4.0
7.0
4.9
3.3
5.0
12.0
-12.1
1.7
R E S I S T O R
R E M A R K S
N O M A R K
P A R T S
N A M E
C A R B O N
C A R B O N
M E T A L
M E T A L
M E T A L
F I R E
C E M E N T
S E M I
F I L M R E S I S T O R
F I L M R E S I S T O R
O X I D E F I L M R E S I S T O R
F I L M
R E S I S T O R
P L A T E R E S I S T O R
P R O O F C A R B O N
F I L M R E S I S T O R
M O L D E D R E S I S T O R
V A R I A B L E
R E S I S T O R
( P = 5 )
( P = 1 0 )
C H I P R E S I S T O R
N O T I C E
U . S . A
G
C A N A D A
E U R O P E
L
C H I N A
A U S T R A L I A
S I N G A P O R E
K O R E A
G E N E R A L
U
C
T
A
K
R
J A P A N
( m o d e l )
B
B R I T I S H
J
S O U T H E U R O P E
E
V
T A I W A N
F
R U S S I A N
P
L A T I N A M E R I C A
S
B R A Z I L
H
T H A I
R E M A R K S
C A P A C I T O R
P A R T S
N A M E
N O
N O
M A R K
M A R K
E L E C T R O L Y T I C
C A P A C I T O R
C E R A M I C
C A P A C I T O R
P O L Y E S T E R F I L M
C A P A C I T O R
P O L Y S T Y R E N E
F I L M
C A P A C I T O R
M I C A
C A P A C I T O R
P O L Y P R O P Y L E N E
F I L M
C A P A C I T O R
S E M I C O N D U C T I V E C E R A M I C C A P A C I T O R
P
T A N T A L U M
C A P A C I T O R
T U B U L A R
S
C A P A C I T O R
C E R A M I C
F I L M
S U L F I D E
P O L Y P H E N Y L E N E
C A P A C I T O R
B P
B P
B P
P
B P
W R _ C K
REM
DIR_N_INT
SSP2_N_DSPSTOP
SSP2_YISO_MUTE
W R _ M O S I
W R _ M I S O
SSP2_DSD_PCM
SSP2_USB_RDY
CNVSS
W R _ B U S Y
CD_YOVI
CD_YIVO
F L _ E X _ C L K
C L A M P _ S W
DIR_MOSI
DIR_MISO
DIR_SCK
DIR_N_CS
K E Y 0
K E Y 1
K E Y 2
FL_EX_CLK
FL_EX_MOSI
PWR_RY
ACPWR_DET
LED_PWR
SSP2_PON
DIR_N_RST
CD_PWR
PULSE_DET
MTR_CTL_DA
T R A Y _ M T R 2
F L _ E X _ M O S I
F L _ N _ C S
F L _ N _ R S T
F L _ N _ C S
F L _ N _ R S T
D A C _ N _ R S T
D A C _ S D A
D A C _ S C L
P R V R
P R V L
C D _ Y O V I
CD_SPDIF_RQ
C L A M P _ M T R 1
C L A M P _ M T R 2
T R A Y _ M T R 1
D I R _ N _ R S T
D I R _ N _ C S
D I R _ S C K
D I R _ M O S I
D I R _ M I S O
D I R _ N _ I N T
CD_MUTE
R Y _ A U D I O
A C P W R _ D E T
N _ R S T
P W R _ R Y
U N C L A M P _ S W
C L A M P _ S W
T R A Y _ S W
T R C L O S E _ S W
T R O P E N _ S W
N_RST
CD_RST
DPWR_ON
SW_CD_OTHER
SSP2_N_IC
T R A Y _ S W
T R C L O S E _ S W
E X _ N _ C S
U N C L A M P _ S W
T R O P E N _ S W
E X _ N _ I C
R E M
L E D _ P W R
K E Y 0
K E Y 1
K E Y 2
T R A Y _ M T R 1
T R A Y _ M T R 2
C L A M P _ M T R 2
C L A M P _ M T R 1
I 2 S S E L _ D S D P C M
I2SSEL_DSDPCM
SEL_DIR_BYPASS
SSP2_YOSI
RY_AUDIO
E X _ N _ I C
S E L _ D I R _ B Y P A S S
SYS_TXD
SYS_RXD
D A C _ N _ R S T
D A C _ S C L
D A C _ S D A
E X _ N _ C S
C D _ Y I V O
P U L S E _ D E T
M T R _ C T L _ D A
C D _ P W R _ D E T
CD_PWR_DET
S Y S _ R X D
S Y S _ T X D
R E M _ R E A R
SSP2_N_YOSI_IRQ
SSP2_YISO
SSP2_N_YISO_IRQ
REM_REAR
S S P 2 _ Y I S O
S S P 2 _ N _ Y O S I _ I R Q
S S P 2 _ N _ Y I S O _ I R Q
S S P 2 _ Y O S I
S S P 2 _ P O N
S S P 2 _ N _ I C
S S P 2 _ Y I S O _ M U T E
S S P 2 _ N _ D S P S T O P
S S P 2 _ D S D _ P C M
S S P 2 _ U S B _ R D Y
SSP2_YOSI_MUTE
S S P 2 _ Y O S I _ M U T E
F P G A _ D S D M U T E
F P G A _ D O P _ D S D P C M
F P G A _ D O P _ D S D R A T E
FPGA_SELA
FPGA_SELB
FPGA_SELC
F P G A _ P R O G
F P G A _ D O N E
F P G A _ I N I T N
F P G A _ I N I T N
F P G A _ D O N E
F P G A _ R R E S E T
F P G A _ S E L C
F P G A _ S E L B
F P G A _ S E L A
F P G A _ D S D M U T E
F P G A _ D O P _ D S D R A T E
F P G A _ D O P _ D S D P C M
F P G A _ P R O G
F P G A _ I O 2
F P G A _ I O 1
F P G A _ I O 0
FPGA_RRESET
FPGA_IO2
FPGA_IO1
FPGA_IO0
FPGA_JTAGEN
F P G A _ J T A G E N
A_MUTE
W R _ C K
N _ R S T
C N V S S
W R _ M O S I
W R _ B U S Y
W R _ M I S O
U N C L A M P _ S W
S W _ C D _ O T H E R
D P W R _ O N
P R V R
P R V L
A _ M U T E
D A C _ A _ M U T E
DAC_A_MUTE
C D _ S P D I F _ R Q
C D _ M U T E
C D _ R S T
C D _ P W R
T R O P E N _ S W
C L A M P _ S W
R 5 0 7 4 7 0
100
R475
R486
100
R 5 0 1 1 0 0
R483
100
C439
0.1/16
R 4 3 4 1 0 0
R428
no_use
R471
0
100
R477
R 5 0 8 4 7 0
R 5 1 0 4 7 0
470
R464
R520
10K
C 4 3 3 0 . 1 / 1 6
C435
0.1/16
100
R479
10K
R476
R462
100
R 5 0 9 4 7 0
1 5 0 K
R 4 3 9
R 4 7 3
n o _ u s e
R 4 9 9 1 0 0
R454
100
R 4 3 2 1 0 0
R518
10K
R470
100
R465
100
R517
10K
C 4 3 4
0 . 1 / 1 6
R453
100
R481
100
R 5 0 4 1 0 0
R 5 0 0 1 0 0
R482
100
100
R451
C460 10/50
s402
1 0 0
R 4 3 7
R 5 0 6 1 0 0
R 4 3 3 1 0 0
R484
100
1 0 0
R 4 2 4
C436
10P(CH)
R519
10K
R456
100
100
R455
R449
100
R516
47K
R 5 0 5 1 0 0
R 4 1 8 1 0 0
R452
100
R 4 4 2
1 0 0 K
R 4 9 5 1 0 0
C438
0.1/16
R457
100
R459
100
R461
100
R466
100
R468
100
R472
100
R 4 1 9 1 0 0
R431
10K
R430
10K
R429
10K
R427
no_use
R426
no_use
C444
4.7/6.3
C448
1/25
R576
47K
C495 0.1/16
C493
100/16
D415 UDZV5.1B
R570
47K
R571
47K
C494 100/16
R569
47K
C496 0.1/16
C B 4 0 1
n o _ u s e
1
2
3
4
5
R 5 3 7 3 3
C481
0.01(B)
R 5 3 8 3 3
C471
0.01(B)
R 5 3 9 3 3
C490
0.01(B)
C437
0.1/16
C473
no_use
C475
no_use
C455
10P(CH)
47K
R511
R492
100
R494
100
R 4 4 0 4 . 7 K
R 4 4 1 n o _ u s e
R 4 2 0 1 0 0
R 4 2 3 1 0 0
R 4 2 2 1 0 0
R 4 2 1 1 0 0
S S P 2 _ N _ Y I S O _ I R Q
S S P 2 _ N _ Y O S I _ I R Q
S S P 2 _ Y I S O _ M U T E
D I R _ N _ I N T
D I R _ M I S O
D I R _ M O S I
D I R _ S C K
D I R _ N _ R S T
D I R _ N _ C S
R480
100
R 4 4 5 4 7 K
R 4 3 8 1 0 0 K
R 4 4 4 1 0 0 K
C 4 8 4
1 / 5 0
R 4 4 7 1 0 0 K
R 5 2 8
C452 10/50
R591
1.0
C449
0.1/16
R458
100
R 5 0 2 1 0 0
R 5 0 3 1 0 0
R583
1.0
C 4 7 6
3 . 3 / 5 0
C 4 7 7
3 . 3 / 5 0
R 5 5 7
4 7 0
R 5 5 8
4 7 0
+ 1 2 R Y
- 1 2 R Y
C B 4 0 2
2 9 F M N - B T K - A
1
2
3
4
5
6
7
8
9
1 0
1 1
1 2
1 3
1 4
1 5
1 6
1 7
1 8
1 9
2 0
2 1
2 2
2 3
2 4
2 5
2 6
2 7
2 8
2 9
R Y _ G N D
V +
8
V -
3
2
1
N E 5 5 3 2 D R
X 5 4 8 2 A 0
5
6
7
V +
8
V -
N E 5 5 3 2 D R
X 5 4 8 2 A 0
5
6
7
3
2
1
R Y _ G N D
R Y _ G N D
R 5 3 4
1 K
R 5 3 6
1 0 K
R 5 3 5
1 0 K
+ 1 2 R Y
C446
10/50
C 4 4 1
0 . 1 / 1 6
C445
0.1/16
R Y _ G N D
C 4 4 0
0 . 1 / 1 6
C 4 4 2
0 . 1 / 1 6
R Y _ G N D
R Y _ G N D
+ 1 2 R Y
- 1 2 R Y
+ 3 . 3 S
R 5 2 5
1 0 K
R 5 4 0 3 3
D414
1SS355VM
R 5 8 8
1 P 1 0
R Y _ G N D
D A C _ N _ R S T
D A C _ S D A
D A C _ S C L
R Y _ A U D I O 2
L 4 0 1
B L M 1 8 P G 4 7 1 S N 1 D
L 4 0 2
B L M 1 8 P G 4 7 1 S N 1 D
C402
100/16
C408
100/16
C404
0.01(B)
C411
0.01(B)
R 4 0 6
4 7
Q 4 0 2
C 2 4 1 2 K ( Q / R / S )
D 4 0 1
1 S S 3 5 5 V M
D 4 0 2
1 S S 3 5 5 V M
R402
1K
R413
no_use
R412
no_use
+3.3S
P I _ S P D I F
R 4 0 1
1 0
R514
47K
R513
47K
R 4 4 3 4 7 K
P R V R
P R V L
R460
100
R469
100
Q401 C2412K(Q/R/S)
R409
47K
R410
47K
R 4 1 1
4 . 7 K
S W _ C D _ O T H E R
G 4 0 1
D 4 1 2
1 S S 3 5 5 V M
D 4 1 3 1 S S 3 5 5 V M
R Y _ G N D
R 5 2 2
1 0 K
R 5 2 3
1 0 K
R 5 3 3
1 0 K
R 5 2 7
1 0 K
R 5 2 1
1 0 K
R 5 2 4
1 0 K
R403
470
+3.3S
R425
no_use
C426
no_use
D404
no_use
D403
no_use
F G 3
C 4 8 3
1 / 5 0
R556
470K
R 5 4 1
4 7 0 K
R 5 2 6
1 0 K
C 4 4 7
0 . 1 / 1 6
D 4 1 1
1 S S 3 5 5 V M
D P W R _ O N
+ 7 M T
+ 7 M T
P H I
1
2
I 2 S S E L _ D S D P C M
S S P 2 _ Y I S O
S S P 2 _ P O N
+ 7 M T
M O _ G N D
M T _ G N D
+ 5 M O 1
R485
100
R487
100
R760
100
R761
100
R762
100
R763
100
R P 1 3 0 Q 3 3 1 D - T R - F
Y C 2 8 8 A 0
VDD
GND
VOUT
CE/CE
S E L _ D I R _ B Y P A S S
R783
3.3K
R784
3.3K
S N 7 4 L V C 1 G 1 2 5 D C K
I C 4 0 6
M T _ G N D
M T _ G N D
V +
8
V -
3
2
N E 5 5 3 2 D R
X 5 4 8 2 A 0
5
6
R 7 8 5
1 0 K
R786
10K
R Y _ G N D
R 7 8 9
1 K
R Y _ G N D
C 6 3 6
0 . 1 / 1 6
C 6 3 7
0 . 1 / 1 6
R Y _ G N D
+ 1 2 R Y
R Y _ G N D
- 1 2 R Y
R790
100
R 7 9 1
n o _ u s e
C B 4 0 5
C B 4 0 4
5 2 0 4 5
X L 4 0 1
2 0 M H Z
R 5 9 4
2 . 2
R 5 9 5
2 . 2
I C 4 0 9
B D 0 0 G A 3 W E F J - E 2
C462
1/16
C474
1/16
C457 47/16
47/16
C443
C479
no_use
C491 47/16
R478
100
C B 4 0 3
5 2 0 4 5
1
2
3
4
5
6
7
8
9
P H I
C B 4 0 6
D G N D
+ 5 M O 1
M T _ G N D
R Y _ G N D
+ 5 D
+ 7 M T
- 1 2 R Y
+ 1 2 R Y
M O _ G N D
+ 5 M O 2
C421
0.01(B)
C419
0.01(B)
C423
0.01(B)
C418 0.1/16
C420 0.1/16
C422 0.1/16
C451 0.1/16
C450
100/16
s401
C463 0.1/16
C464
0.01(B)
C465 0.1/16
C466
0.01(B)
P R V D
F L _ P O N
S S P 2 _ Y O S I
S S P 2 _ N _ I C
S S P 2 _ D S D _ P C M
S S P 2 _ N _ D S P S T O P
F L _ P O N
P R V D
S S P 2 _ U S B _ R D Y
R792
100
S S P 2 _ Y O S I _ M U T E
R 8 3 6 1 0 0
R 8 3 7 1 0 0
R 8 3 8 1 0 0
R839
100
R840
100
R841
100
R 8 4 2 1 0 0
R 8 4 3 1 0 0
R 8 4 4 1 0 0
F P G A _ R R E S E T
F P G A _ S E L C
F P G A _ S E L B
F P G A _ S E L A
F P G A _ D S D M U T E
F P G A _ I O 2
F P G A _ I O 1
F P G A _ I O 0
F P G A _ D O P _ D S D P C M
F P G A _ D O P _ D S D R A T E
F P G A _ D O N E
R845
100
R846
100
R847
100
R848
100
+ 5 M O 2
L 4 3 1
B L M 1 8 P G 4 7 1 S N 1 D
C706
100/16
C707
0.01(B)
F G 1
S T 4 0 1
0
J456
0
J457
0
J458
R872
no_use
C708
no_use
D435
no_use
D436
no_use
F P G A _ I N I T N
F P G A _ P R O G
R873
100
F P G A _ J T A G E N
1 5 0 6 0 1 1 2 3 K 3
C B 4 1 0
A _ M U T E
R883
100
+ 3 . 3 S
R788
18K
R 7 8 7
1 8 K
+ 7 M T
R885
390
R436
56K
R435
12K
R886
1.8K
C B 4 1 4
n o _ u s e
1
2
1 2
1 1
3
4
5
6
7
8
9
1 0
R887
no_use
C456
10P(CH)
C478
10P(CH)
R404
4.7K
C412
10P(CH)
C413
10P(CH)
C638
10P(CH)
C454
10P(CH)
C472
0.1/16
C453
0.1/16
C487
0.1/16
C482
0.1/16
C461
0.1/16
C486
0.1/16
C469
0.1/16
C459
0.1/16
C485
0.1/16
C458
0.1/16
C480
0.1/16
C428
0.1/16
C432
0.1/16
C430
0.1/16
C429
0.1/16
C427
0.1/16
C431
0.1/16
C406
no_use
C405
0.1/16
C401
0.1/16
C403
0.1/16
C407
0.1/16
C417
0.1/16
C416
0.1/16
R474
47
C470
10P(CH)
R890
100
D A C _ A _ M U T E
R 8 9 2 1 0 0 K
R Y _ G N D
R512
4.7K
R515
4.7K
C714
1000P(B)
C715
1000P(B)
C716
1000P(B)
C718
1000P(B)
C719
1000P(B)
C720
1000P(B)
C721
1000P(B)
C722
1000P(B)
C723
1000P(B)
C724
1000P(B)
C725
1000P(B)
C726
0.01(B)
C727
0.01(B)
M O _ G N D
M O _ G N D
C728
1000P(B)
C729
1000P(B)
G
2
D 6
S 1
U M 6 K 1 N T N
Q 4 1 2
n o _ u s e
G
5
D 3
S 4
R896
no_use
Q 4 1 3
n o _ u s e
R 8 9 7
n o _ u s e
+3.3S
D439
1SS355VM
D440
1SS355VM
0
J461
D405
RB520SM-40
D408
RB520SM-40
D406
RB520SM-40
D409
RB520SM-40
D407
RB520SM-40
D410
RB520SM-40
1 0 0
R 4 1 4
1 0 0
R 4 1 5
F W _ W C K
F W _ S D O
DGND
D441
1SS355VM
D442
1SS355VM
9 1 0 1 1 1 2 1 3 1 4 1 5 1 6 1 7 1 8 1 9 2 0 2 1 2 2 2 3 2 4 2 5
CD_PWR_DET
VSS
SYS_RXD
P R V D
C L A M P _ S W
T R X D
SSP2_YISO_MUTE
SSP2_N_YISO_IRQ
D A C _ S C L
LED_PWR
G N D
SSP2_USB_RDY
CD_YOVI
REM
W R _ M O S I
C L A M P _ M T R 1
SSP2_YOSI_MUTE
DPWR_ON
F P G A _ P R O G
T R C L O S E _ S W
D A C _ N _ R S T
N C
L O A D -
D A C _ S D A
L O A D +
CD_MUTE
PULSE_DET
N_NMI
CNVSS
A V C C
A_MUTE
SSP2_YOSI
F P G A _ I N I T N
T R A Y _ S W
P R V R
T C K
FPGA_SELB
DIR_N_INT
PWR_RY
FPGA_SELA
FPGA_RRESET
FPGA_SELC
T R A Y _ M T R 1
N_RST
FPGA_IO1
K E Y 1
P R V L
SEL_DIR_BYPASS
K E Y 2
DRI_SCK
BYTE
K E Y 0
W R _ B U S Y
SSP2_N_YOSI_IRQ
FL_EX_MOSI
PI_DVDRST
V R E F
FL_EX_CLK
SW_CD_OTHER
F P G A _ D O P _ D S D R A T E
F P G A _ D S D M U T E
SSP2_YISO
VCC2
FPGA_IO0
VCC1
T R A Y _ M T R 2
DIR_N_CS
W R _ C K
-
ACPWR_DET
VSS
RY_AUDIO
U N C L A M P _ S W / N _ C E
XIN
F P G A _ D O N E
DIR_MOSI
F L _ N _ C S
T M O D E
C L A M P _ M T R 2
FPGA_JTAGEN
XOUT
DIR_MISO
SSP2_N_DSPSTOP
SSP2_N_IC
A V S S
F P G A _ D O P _ D S D P C M
t o W r i t e r
F L A S H U - C O M ( W r i t e n b y Y E M )
W R _ M I S O
SSP2_DSD_PCM
N _ R S T
DIR_N_RST
T V c c d
T T X D
FPGA_IO2
CD_PWR
T R O P E N _ S W
DAC_A_MUTE
CD_YIVO
REM_REAR
SYS_TXD
MTR_CTL_DA
I2SSEL_DSDPCM
Y D C B O O T
S T B Y _ C N T / N _ E M P
T R O U T _ S W
C L A M P _ S W
G N D
N C
E X _ N _ C S
E X _ N _ I C
F L _ P O N
F L _ N _ R S T
SSP2_PON
N C
CD_SPDIF_RQ
L _ M O T O R -
L _ M O T O R +
+ 9 S U B
P W R _ D E T
R Y _ P W R
M G N D
+ 3 . 3 M
N _ R E S
T R A Y _ S W
M G N D
L E D _ P O W E R
M G N D
F L _ R E S E T
+ 3 . 3 S
E X _ N _ C S
S 2 T R A Y O P E N
S 4 C L A M P
K E Y 2
F L _ C S
F L _ E X _ C L K
C L A M P M O T O R +
C L A M P M O T O R -
M G N D
S 1 T R A Y C L O S E
S 3 U N C L A M P
K E Y 0
E X _ N _ I C
K E Y 1
I R
F L _ E X _ D A T A
+ 3 . 3 M
to FRONT(4)
4 0 1
9 0 0
D I G I T A L
C D _ P W E R _ D E T
S P D I F _ O U T
M O _ G N D
+ 5 M O 2
T R O P E N _ S W
S P D I F _ R Q
C D _ Y O V I
+ 7 M T
M T _ G N D
C D _ Y I V O
C D _ M U T E
M O _ G N D
+ 5 M O 2
+ 7 M T
+ 5 M O 1
M O _ G N D
M O _ G N D
M T _ G N D
+ 5 M O 1
C D _ P W R
C L A M P _ S W
C D _ R S T
R E M _ R E A R
S Y S _ T X D
S Y S _ R X D
003.sht CB909
(FL)
to Loader Mecha
(SUBTR)
002.sht W903
to FRONT(2)
to FRONT(1)
001.sht CB902
(DIGITAL POWER)
+ 7 M T
+ 7 M T
M T _ G N D
M T _ G N D
+ 5 M O 1
+ 5 M O 1
M O _ G N D
M O _ G N D
+ 5 M O 2
+ 5 M O 2
N C
N C
P R V D
F L _ P O N
+ 5 D
+ 5 D
+ 5 D
D G N D
D G N D
D G N D
+ 1 2 R Y
- 1 2 R Y
R Y _ G N D
to Zoran Module
to IC401
003.sht
(SSP2)
002.sht
(DIR)
to IC424
002.sht
(FPGA)
to IC443
002.sht
(PCM/DSD Sel)
002.sht
(DAC)
to CB408
t o C B 4 1 0
0 0 1 . s h t
( D I G I T A L P O W E R )
0 0 2 . s h t
( + 5 D C o n t r o l )
0 0 1 . s h t
M O _ G N D
M O _ G N D
M O _ G N D
M O _ G N D
M O _ G N D
M O _ G N D
M O _ G N D
t o I C 4 2 4
0 0 2 . s h t
( D I R )
D e s t i n a t i o n P a r t L i s t
+ - - - - - - - - + - - - - - - - - - - - - - - - + - - - - - - - - - - - - - - - + - - - - - - - - - - - - - - - + - - - - - - - - - - - - - - - + - - - - - - - - - - - - - - - +
| s X X | L O C | J | U T K A L V S | B | G |
+ - - - - - - - - + - - - - - - - - - - - - - - - + - - - - - - - - - - - - - - - + - - - - - - - - - - - - - - - + - - - - - - - - - - - - - - - + - - - - - - - - - - - - - - - +
| s 4 0 1 | C 5 8 1 | U R 2 3 8 1 0 | U R 2 3 8 1 0 | U U 2 3 8 1 0 | U U 2 3 8 1 0 |
| | C 4 5 0 | 1 0 0 / 1 6 | 1 0 0 / 1 6 | 1 0 0 / 1 6 | 1 0 0 / 1 6 |
+ - - - - - - - - + - - - - - - - - - - - - - - - + - - - - - - - - - - - - - - - + - - - - - - - - - - - - - - - + - - - - - - - - - - - - - - - + - - - - - - - - - - - - - - - +
| s 4 0 2 | C 4 6 0 | U U 2 6 7 1 0 | U U 2 6 7 1 0 | U U 2 3 7 1 0 | U U 2 3 7 1 0 |
| | | 1 0 / 5 0 | 1 0 / 5 0 | 1 0 / 1 6 | 1 0 / 1 6 |
+ - - - - - - - - + - - - - - - - - - - - - - - - + - - - - - - - - - - - - - - - + - - - - - - - - - - - - - - - + - - - - - - - - - - - - - - - + - - - - - - - - - - - - - - - +
IC418, 419
: BA6956AN
Reversible motor driver
VREF
GND
RIN
FIN
CTRL
TSD
7
9
1
8
OUT1
4
OUT2
RNF
2
3
VCC
6
VM
5
1
2
3
4
8
7
6
5
1OUT
1IN–
1IN+
V
CC–
V
CC+
2OUT
2IN–
2IN+
OUT
VCC–
VCC+
36 pF
37 pF
14 pF
7 pF
15
460
15
IN+
IN
IC405, 407, 438
: NE5532DR
Dual low-noise operational amplifiers
IC409
: BD00GA3WEFJ-E2
300 mA variable output LDO regulator
–
+
+
GND
EN
FB
Vo
Vcc
SOFT
START
TSD
OCP
3
5
2
1
8
IC404
: R5F364AENFA
Single chip 16-bit microprocessor
Timer (16-bit)
Internal peripheral functions
Inputs (timer B): 6
Three-phase motor control circuit
Outputs (timer A): 5
Watchdog timer
(15-bit)
Remote control signal
receiver
(2 circuits)
PWM function (8-bit x 2)
CEC function
Real-time clock
VCC1 ports
VCC2 ports
A/D converter
(10-bit resolution X 26 channels)
System clock generator
PLL frequency synthesizer
On-chip oscillator (125 kHz)
X
IN
-X
OUT
X
CIN
-X
COUT
Port P0
8
Port P1
8
Port P1
8
Port P3
8
Port P4
8
Port P5
8
Port P10
8
Port P9
8
Port P8
8
Port P7
8
Port P6
8
ISP
USP
INTB
SB
CRC arithmetic circuit
(CRC-CCITT or CRC-16)
DMAC (4 channels)
Voltage detecter
On-chip debugger
Power-on reset
Multiplier
Memory
ROM
RAM
FB
A1
FLG
PC
UART or
clock synchronous serial I/O
Clock synchronous serial I/O
Multi-master I
2
C-bus interface
(6 channels)
(8 bit x 2 channels)
(1 channel)
D/A converter
(8-bit resolution X 2 circuits)
M16C/60 series
Microprocessor core
R0L
R0H
R1H
R1L
R2
R3
FB
A1
A0
IC406
: SN74LVC1G125DCKR
Single bus buffer gate
1
2
3
OE
A
GND
4
5 VCC
Y
V
DD
CE
Vref
4
3
1
2
Current Limit
V
OUT
GND
Pin No.
1
2
3
4
Symbol
V
OUT
GND
CE
V
DD
Description
Output Pin
Ground Pin
Chip Enable ("H" Active)
Input Pin
IC408
: RP130Q331D-TR-F
Voltage regulator
to DIGITAL 2/3
to DIGITAL 2/3
to DIGITAL 2/3
to DIGITAL 2/3
to DIGITAL 3/3
to Loader mechanism unit
to Module board_CN211
Writing port
to DIGITAL 1/3
to DIGITAL 2/3
Details of colored lines
Red / full line:
Power supply (+)
Red /dashed line: Power supply (-)
Orange: Signal
detect
Yellow: Clock
Green: Protection
detect
Brown: Reset
signal
Blue:
Panel key input
Summary of Contents for CD-S2100
Page 6: ... FRONT PANELS U K A B G L V S J models T model 6 CD S2100 CD S2100 ...
Page 7: ... REAR PANELS U V S models U model V model Bottom view 7 CD S2100 CD S2100 ...
Page 8: ...A B G L models K model T model 8 CD S2100 CD S2100 ...
Page 9: ...J model 9 CD S2100 CD S2100 ...
Page 84: ...MEMO MEMO CD S2100 84 ...
Page 85: ...MEMO 85 CD S2100 CD S2100 ...
Page 86: ...CD S2100 ...
