CVP-205/CVP-205M
23
LSI PIN DESCRIPTION
PIN
NO.
I/O
FUNCTION
NAME
PIN
NO.
I/O
FUNCTION
NAME
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
S1
S2
S3
S4
S5
VREF+
VDD
OSC2
OSC1
VSS
XI
XO
MMOD
RD0
RXD
D0
D1
D2
D3
D4
/RST
D5
D6
D7
D8
D9
S6
S7
S8
S9
S10
S11
I
I
I
I
I
-
-
O
I
-
I
O
I
O
I
O
O
O
O
O
I
O
O
O
O
O
I
I
I
I
I
I
Switch matrix data
Power supply (+5V, analog)
Power supply (+5V)
Crystal oscillator (8MHz)
Crystal oscillator (8MHz)
Ground
Not used
Not used
Memory mode select (Grounded)
Rotary encoder data
MIDI receive data
LED and switch drive data
Reset
LED and switch drive data
Switch matrix data
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
S12
S13
S14
TXD
S15
S16
S17
S18
L16
L17
L18
L19
L8
L9
L10
L11
L12
L13
L14
L15
L7
L6
L5
L4
L3
L2
L1
L0
VREF
AD0
AD1
S0
I
I
I
O
I
I
I
I
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
-
I
I
I
Switch matrix data
MIDI transmit data
Switch matrix data
LED drive data
LED and switch drive data
Grounded
Analog input
Analog input
Switch matrix data
MN101C027YB (XS711200) CPU
PIN
NO.
I/O
FUNCTION
NAME
PIN
NO.
I/O
FUNCTION
NAME
1
2
3
4
5
6
7
8
9
10
11
12
AINR+
AINR-
VREF
VA
AGND
AINL+
AINL-
TST1
HPFE
TST2
TST3
VD
I
I
O
-
-
I
I
I/O
I/O
I/O
-
Analog signal input (R c)
Analog signal input (R channel -)
Reference voltage
Analog power supply
Analog ground
Analog signal input (L c)
Analog signal input (L channel -)
Test mode setting 1
HPF on/off
Test mode setting 2
Test mode setting 3
Digital power supply
13
14
15
16
17
18
19
20
21
22
23
24
DGND
TST4
AMODE2
/PD
MCLK
SCLK
LRCK
FSYNC
SDATA
CMODE
SMODE1
VB
-
I/O
I
I
I/O
I
I/O
O
I
I
-
Digital ground
Test mode setting 4
Interface clock select 2
Power-down mode
Master clock input
Serial data clock
Input/Output channel clock
Frame synch. clock
Serial data output
Master clock select
Interface clock select 1
Digital power supply
AK5351-VF-E2 (XV510A00) ADC (Analog to Digital Converter)
PIN
NO.
I/O
FUNCTION
NAME
PIN
NO.
I/O
FUNCTION
NAME
1
2
3
4
5
6
7
8
9
10
11
12
AINR+
AINR-
VREF
VA
AGND
AINL+
AINL-
TST1
HPFE
TST2
TST3
VD
I
I
O
-
-
I
I
I/O
I/O
I/O
-
Analog signal input (R c)
Analog signal input (R channel -)
Reference voltage
Analog power supply
Analog ground
Analog signal input (L c)
Analog signal input (L channel -)
Test mode setting 1
HPF on/off
Test mode setting 2
Test mode setting 3
Digital power supply
13
14
15
16
17
18
19
20
21
22
23
24
DGND
TST4
AMODE2
/PD
MCLK
SCLK
LRCK
FSYNC
SDATA
CMODE
SMODE1
VB
-
I/O
I
I
I/O
I
I/O
O
I
I
-
Digital ground
Test mode setting 4
Interface clock select 2
Power-down mode
Master clock input
Serial data clock
Input/Output channel clock
Frame synch. clock
Serial data output
Master clock select
Interface clock select 1
Digital power supply
AK5351-VF-E2 (XV510A00) ADC (Analog to Digital Converter)
Summary of Contents for Clavinova CVP-103M
Page 34: ...CVP 205 CVP 205M 34 DM Circuit Board 2NA V716590 2 2 Pattern side ...
Page 37: ...B B PNR Circuit Board CVP 205 CVP 205M 37 2NA V713520 2 1 ...
Page 38: ...ENC Circuit Board B B CVP 205 CVP 205M 38 Pattern side Pattern side 1 PNR ENC 2NA V713520 2 ...
Page 43: ...to DM CN10 SWX Circuit Board CVP 205 CVP 205M 43 2NA V716050 1 Pattern side Component side ...
Page 100: ...CVP 205 CVP 205M 24 SIDE BOARD ASSEMBLY Top view Side view 1 9 8 6 6a 6b 11 7 7 4 2 3 5 ...
