Yamaha DBR Series Service Manual Download

Page: 21 / 109

DBR10/DBR12/DBR15

LSI PIN DESCRIPTION

（LSI 端子機能表）

PCM1781DBQR

(X7375A00)

DAC

(Digital to Analog Converter) ........................................................21

PCM1803ADBR

(X7357B00)

ADC

(Analog to Digital Converter) ........................................................21

PCM1803DBR

(X7357A00)

ADC

(Analog to Digital Converter) ..........................................................21

TM4C1230D5PMIR

(YF553A00)

CPU

.................................................................................................22

YSS952-QZE2A

(YE441A00)

DSP (SPR-2)

(Digital Signal Processor) ...............................................21

PIN
NO.

I/O

FUNCTION

NAME

PIN
NO.

I/O

FUNCTION

NAME

1
2
3
4
5
6
7
8
9

VINL

VINR

VREF1
VREF2

AGND

PDWN

BYPAS

TEST

LRCK

I
I
-
-
-
-
I
I
I

I/O

Analog input (L ch)
Analog input (R ch)
Reference-voltage-1 decoupling capacitor
Reference-voltage-2 decoupling capacitor
Analog power 5V
Analog ground
Power-down control, active-low
HPF bypass control
Test, must be connected to DGND
Audio data latch enable input/output

12
13
14
15
16
17
18
19

BCK

DOUT

DGND

SCKI

OSR

FMT0
FMT1

MODE0
MODE1

I/O

-
-
I
I
I
I
I
I

Audio data bit clock input/output
Audio data digital output
Digital ground
Digital power 3.3V
System clock input
Oversampling ratio select input
Audio data format select input 0
Audio data format select input 1
Mode select input 0
Mode select input 1

PCM1803ADBR

(X7357B00)

ADC

(Analog to Digital Converter)

PCM1803DBR

(X7357A00)

ADC

(Analog to Digital Converter)

DSP: IC401

PIN
NO.

I/O

FUNCTION

NAME

PIN
NO.

I/O

FUNCTION

NAME

1
2
3
4
5
6
7
8
9

12
13
14
15
16

GPIO5
GPIO4
GPIO3

DVSS

GPIO2
GPIO1
GPIO0

PLLVDD

IC_N

PLLVSS
PLLVSS

XIN

XOUT

IOVDD

SCL

SDA

I/O
I/O
I/O

-
I
I
I
-
I
-
-
I

-
I

I/O

General-purpose I/O pins

GND

General-purpose I/O pins

PLL power supply
Hardware reset pin

PLL GND

Clock input pin
Clock output pin
Control interface power supply
I

C control bus clock input pin

C control bus data I/O pin

17
18
19

20
21
22
23
24
25
26
27
28
29
30
31
32

OPEN

DVSS

IRQ_N

DVDD18

GPIO11

TESTb

DVSS

OPEN

DVSS

GPIO10

GPIO9
GPIO8
IOVDD

GPI07

DVDD18

GPI06

-
-

I/O

I
-
-
-

I/O
I/O
I/O

I/O

Leave this pin open
GND
Interrupt request output pin to the host controller
Core power supply
General-purpose I/O pins
Test pin
GND
Leave this pin open
GND

General-purpose I/O pins

Control interface power supply
General-purpose I/O pins
Core power supply
General-purpose I/O pins

YSS952-QZE2A

(YE441A00)

DSP (SPR-2)

(Digital Signal Processor)

DSP: IC402

PIN
NO.

I/O

FUNCTION

NAME

PIN
NO.

I/O

FUNCTION

NAME

)07

'(03
'(03

087(

6&.

'$7$

%&.

/5&.

,
,
,
,
,
,
,
,

'DWDIRUPDWVHOHFW
'HHPSKDVLVFRQWURO
'HHPSKDVLVFRQWURO
6RIWPXWHFRQWURO
6\VWHPFORFNLQSXW
$XGLRGDWDGLJLWDOLQSXW
$XGLRGDWDELWFORFNLQSXW
$XGLRGDWDOHIWDQGULJKWFORFNLQSXW

7(67

1&
9

$*1'

&20

287

=(52$

2
2
2

7HVWSLQIRUIDFWRU\XVH0XVWEH/2:RURSHQ
1RFRQQHFWLRQ
3RZHUVXSSO\9
*URXQG
&RPPRQYROWDJHGHFRXSOLQJ
$QDORJRXWSXWIRU5FKDQQHO
$QDORJRXWSXWIRU/FKDQQHO
=HURIODJRXWSXWIRU/DQG5FKDQQHOV

PCM17

1DBQR

DAC

'LJLWDOWR$QDORJ&RQYHUWHU

'63,&