74
DVR-700/NS-PSW700/NS-P700
D
VR-70
0/
NS-PSW70
0/NS-P70
0
Note:
All input pins except internal biased pins and internal pull-down pin should not be left floating.
Pin No.
Function Name
I/O
Detail of Function
61
RX2
I
Receiver channel 2 pin (Internal biased pin / Internally biased at PVDD/2)
62
NC –
No connect pin
No internal bonding / This pin should be connected to PVSS
63
RX3
I
Receiver channel 3 pin (Internal biased pin / Internally biased at PVDD/2)
64
PVSS
–
PLL ground pin
65
R –
External resistor pin
12 k-ohms +/-1 % resistor should be connected to PVSS externally
66
PVDD
–
PLL power supply pin, 4.5 V to 4.5 V
67
RX4
I
Receiver channel 4 pin (Internal biased pin / Internally biased at PVDD/2)
68
TEST2 I
Test 2 pin
This pin should be connected to PVSS
69
RX5
I
Receiver channel 5 pin (Internal biased pin / Internally biased at PVDD/2)
70
CAD0
I
Chip address 0 pin (ADC/DAC part)
71
RX6
I
Receiver channel 6 pin (Internal biased pin / Internally biased at PVDD/2)
72
CAD1
I
Chip address 1 pin (ADC/DAC part)
73
RX7
I
Receiver channel 7 pin (Internal biased pin / Internally biased at PVDD/2)
74
I2C I
Control mode select pin
“L”: 4-wire serial, “H”: I2C bus
75
DAUX2
I
Auxiliary audio data input pin (DIR/DIT part)
76
VIN
I
V-bit input pin for transmitter output
77
MCLK
I
Master clock input pin
78
TX0
O
Transmit channel (through data) output 0 pin
79
TX1 O
Transmit channel output 1 pin
When TX bit = “0”, transmit channel (through data) output 1 pin.
When TX bit = “1”, transmit channel (DAUX2 data) output pin (default)
80
INT0
O
Interrupt 0 pin
Summary of Contents for DVX-700
Page 97: ...A B C D E F G H I J 1 2 3 4 5 6 7 DVR 700 NS PSW700 NS P700 97 SUB P C B Side B NS PSW700...
Page 120: ...120 DVR 700 NS PSW700 NS P700 DVR 700 NS PSW700 NS P700 SYSTEM MENU...
Page 121: ...121 DVR 700 NS PSW700 NS P700 DVR 700 NS PSW700 NS P700 MEMO...
Page 122: ...DVD CONTROLLER DVR 700 SUBWOOFER SYSTEM CONTROL NS PSW700 SPEAKERS NS P700...
