MONTAGE6/MONTAGE7
H
G
F
E
D
C
B
A
1
2
3
4
5
6
3
1
2
3
4
5
6
■
BLOCK DIAGRAM
(ブロックダイアグラム)
(MONTAGE6/MONTAGE7)
■
BLOCK DIAGRAM
(ブロックダイアグラム)
(MONTAGE6/MONTAGE7)
28CA1-2001151371
Touch Panel
LED
Ba
ck
Light
+3.3D
+3.3D
x1
6
x1
6
+3.3D
x16
SM1_CLK:
95.9616.MHz
+3.3D
D[15-8]
S
M
3
_C
L
K
:
95
.9
6
16
.M
Hz
S
M
4
_C
L
K
:
95
.9
6
16
.M
Hz
x16
+3.3D
x16
SL1_CLK:
95.9616.MHz
SDR
SDRAM
128Mbit
(16MB)
+3.3D +1.0L
VDDS_DDR
x16
VMMC
x4
Bus clock:
400MHz
Data clock:
52MHz
+3.3D
x16
Address BUS,etc
+3.3D
Data BUS,etc
+5D
VDD_MPU
to CPU VDD_MPU
VDD_CORE
to CPU VDD_CORE
VDDS_DDR
to CPU VDDS_DDR and DDR3 SDRAM
VDIG2
to CPU VDDS_PLLx/SRAMx/OSC/RTC
VDDA_1.8V_USB
to CPU VDDA1P8V_USBx
VDDA_3.3V_USB
to CPU VDDA3P3V_USBx
VMMC
to CPU VDDSHV4
and eMMC
VDDA_ADC
to CPU VDDA_ADC
VDAC
to CPU VDDS
+3.3D
+1.5P
+1.0M
+1.0L
Bus clock:100MHz
USB TO HOST
Hz
(C
P
U)
B
)
USB2.0 HighSpeed
KLU1T041A-Y LF
JTAG I/F
debug only
pin header 6pin
+5D
USB TO DEVICE
+3.3D
49.152MHz
MII
ETHERNET
LCD
7inch TFT WVGA
debug only
USB TO HOST
Encoder
A
IN
[3
-0
]
/A
D
D
A
_P
D
N
A
D
INL
_I
NS
/C
P
U_
M
UT
E
/B
EEP
_O
N
M
IC
/LI
NEN
D
A
C
_M
UT
E
S
US
_I
NS
FS
W
360°VR(AD 2ch)
B
L_
O
N/
O
FFN
S
T
B
Y
boot config port
Slide VR
x2
4
Master Volume
+3.3D
RIBBON CONTROLLER
PB
MW
AC 85
~
264V
AC INLET
/B
EEP
_O
N
PIO_3.3V
+5D
E-bus
E-
bu
s
!
S
T
B
Y
Power Supply Unit
!
!
!
-15A
+15A
+5D
Power SW
+5A1
+15A
+3.3D
+5A1
+3.3D
+5A2
+3.3D
+5A2
±15A
PHONES
L/MONO
R
L/MONO
R
Balanced/Unbalansed
OUTPUT
ADINR_INS
MIC/LINEN
/CPU_MUTE
MIDI THRU
SUSTAIN
ASSIGNABLE
FOOT SWITCH
FOOT CONTROLLER
SUS_INS
FSW
S
W
P
S
_C
S
N
A
[1
9
-1
]
S
W
P
S
_W
A
IT
N
A
D
[1
5
-0
]
+3.3D +1.0M
S
W
P
M
_C
S
N
A
[1
9
-1
]
RD
N
W
RN
/
M
_I
RQ
0
/
M
_EI
RQ
S
S
P
2
_C
S
N
A
[1
5
-1
]
/P
_I
RQ
A
D
[1
5
-0
]
+3.3D +1.5P
ADC_SDO
M_SDO[7-4,2-0]
M_WCLK1,0
M_BCLK
M_SYSCLK1,0
REFCLK
C
P
U_
S
D
O
CPU_SDO
M
_S
D
O
0
M
_S
Y
S
C
LK
0
M
_B
C
LK
M
_W
C
LK
0
M
_S
Y
S
C
LK1
M
_W
C
LK1
RE
FC
LK
L_
S
D
O
[7
-4
]
BOSD[2-0]
AOSD[3-0]
L_BCLK
L_WCLK0
L_SDO[3-0]
P_SDO[2-0]
P_BCLK
P_WCLK0
P
_S
D
O
[4
-
3]
M
_S
Y
S
C
LK1
M
_W
C
LK1
M
_S
D
O
[7
-
4]
P
_S
D
O
[4
-
3]
L_
S
D
O
[7
-4
]
M_SYSCLK0
M_BCLK
M_WCLK0
M_SYSCLK0
M_BCLK
M_WCLK0
M_SDO2
M_SDO1
M_WCLK0
M_BCLK
M_SYSCLK0
/ADDA_PDN
DAC_MUTE
ADC_SDO
/LAN_CTRL_RES
PIO_3.3V
to CPU VDDSHVX etc
VAUX2
+3.3D
/SWP_RES
/SWP_RES
/SRC_RES
/PROM_RES
/PROM_RES
P
IO
_3
.3
V
+3
.3
D
+5
B
L
+5
D
+3.3D
/CPLD_RES
A
D
C
_S
D
O
JTAG I/F
debug only
J
T
A
G
I
/F
debug only
+5D
+3.3D
E
-
bu
s
SYS_RESETN
+5D
+3.3D
+3.3D
US
B
_EN
B
USB_ENB
Switch&LED
GAIN
PIO_3.3V
PIO_3.3V
USB2.0 HighSpeed
±15A
/
M
_I
RQ
1
/
M
_I
RQ
0
/
M
_EI
RQ
/M
_I
RQ
1
J
T
A
G
I
/F
debug only
Balanced/Unbalansed
ASSIGNABLE OUTPUT
AD INPUT
+3.3D
/P
_I
RQ
x1
6
S
S
P
2_
W
A
IT
N
U
S
B
1_
O
C
N
USB1_OCN
ADINL_INS
A
D
INR
_I
NS
S
W
P
M
_W
A
IT
N
A
D
[1
5-
0]
RD
N
W
RN
RD
N
W
RN
+3.3D
D[7-0]
J
T
A
G
I
/F
debug only
B
L_
O
N/
O
FFN
L
V
D
S
_I
C
N
LVDS_ICN
+3.3D
debug only
RC
filter
+5A2
-15A
+15A
+15A
+5D
+5D
+15A
/CPLD_RES
/PROM_RES
/SWP_RES
/SRC_RES
PMIC_PONRST
PMIC_PONRST
/LAN_CTRL_RES
BUFF_/OE
GPMC_WAIT1
BUFF_/OE
VMMC
VDIG2
L
E
D
_E
N
L
E
D
_P
W
M
D
C
L
K
:3
0
M
Hz
V
L
ED
SYS_RESETN
Switch & LED
360°VR(AD 2ch)
VAUX2
IC016 (3P)
IC005 (3P)
JK001
JK002
JK006
JK007
JK003
JK004
JK005
IC001 (8P)
IC002 (8P)
CN003 (7P)
CN004 (6P)
TR012
TR013
TR011
TR014
IC015
(8P)
IC010
(8P)
IC011
(8P)
IC013
(8P)
IC014
(8P)
IC007
(8P)
IC008
(8P)
IC009
(8P)
TR015
TR019
TR020
TR021
TR022
TR017
TR018
TR016
TR005–010
CN002 (5P)
CN302
(4P)
CN303
(4P)
TR301, SP301
CN301 (13P)
JK105
JK103
JK102
JK100
JK101
CN101 (6P)
CN200 (6P)
SW200–203
LD200–203
C
N
30
1
(2
P
)
C
N
30
0
(2
P
)
C
N
40
0
(3
P
)
CN401 (5P)
CN001
(4P)
CN002
(13P)
IC214
(20P)
X201
JK201
CN205
(2P)
CN403
CN501
IC402 (5P)
CN505 (7P)
X502
IC501 (14P)
IC805 (54P)
CN801
(4P)
CN102 (7P)
CN101 (6P)
VR102–109
VR300–VR308
CN103 (26P)
EC100
CN100 (26P)
CN101
(4P)
CN102
(4P)
STBY
+5D
IC006 (5P)
not installed
GAIN SW
DA_E [0–9], D_E_RE
LA_E [1–6], S_E [0–6]
D_E_RE, S_E [0–1]
IC302 (8P), IC305 (5P)
IC303, 306 (5P)
TR303, FT301
AN_E [0–7]
AN_S [0–17]
D
A
_E
[
1–
4]
,
L
A
_E
[
10
],
S
_E
[
10
]
A
N
_S
[
18
–2
2]
PB
MW
RIBBON
RIBBON
PB
MW
+3.3R
FC1
FC2
SUSTAIN
SUS_INS
FSW
+5D
Keyboard unit
MONTAGE6
:6
1key
MONTAGE7
:7
6key
CN4 (7P)
WARNING
Components having special characteristics are marked
Z
and must be
replaced with parts having specification equal to those originally installed.
Z
印の部品は、安全を維持するために重要な部品です。
交換する場合は、安全のために必ず指定の部品をご使用ください。
Summary of Contents for Montage 6
Page 32: ...MONTAGE6 MONTAGE7 32 DM Circuit Board 2NA ZK72200 B B...
Page 33: ...33 MONTAGE6 MONTAGE7 Pattern side 2NA ZK72200 B B...
Page 35: ...35 MONTAGE6 MONTAGE7 Scale 90 100 Pattern side 2NA ZM35120 AJK Circuit Board...
Page 38: ...MONTAGE6 MONTAGE7 38 PNL Circuit Board 2NA ZP05150 2 D D...
Page 39: ...39 MONTAGE6 MONTAGE7 Scale 80 100 2NA ZP05150 2 Pattern side D D...
Page 40: ...MONTAGE6 MONTAGE7 40 PNR PNR EN Circuit Board 2NA ZP05160 to PNL CN103 E E...
Page 41: ...41 MONTAGE6 MONTAGE7 Scale 90 100 2NA ZP05160 Component side to PNL CN103 E E...
Page 99: ...99 MONTAGE6 MONTAGE7 4 Searching for the updater OK 5 Finish Please turn off 6 USB 7 8 23...