A
1
2
3
4
5
6
7
8
9
10
B
C
D
E
F
G
H
I
J
K
L
M
N
RX-E810/RX-E410/NX-E800
SCHEMATIC DIAGRAM
33
★
All voltages are measured with a 10M
Ω
/V DC electronic volt meter.
★
Components having special characteristics are marked
s
and must be replaced
with parts having specifications equal to those originally installed.
★
Schematic diagram is subject to change without notice.
OPERATION 1/2
OPERATION (1)
FL DISPLAY
BALANCE
TREBLE
BASS
INPUT
PHONES
to INPUT (1)_CB200
Page 37
A2
to INPUT (2)_CB201
Page 37
A8
to MAIN (4)_CB19
Page 36
D9
-20.7
-15.4
-20.8
-20.7
-20.8
-20.8
-20.8
-20.8
-20.8
-20.8
-20.8
-20.8
-20.8
-20.8
-20.8
-20.8
-20.5
-22.3
-22.3
-22.3
-15.7
-19.1
5.0
2.9
2.9
0
2.9
0
0
-19.1
-22.5
-22.3
-22.3
-14.3
-20.7
-15.8
-15.8
-15.8
-15.8
-15.9
-14.3
-20.7
-22.3
-20.7
-15.8
-17.5
-15.9
5.0
5.0
-20.5
-20.7
4.9
0
0
0
4.9
4.8
4.9
3.4
3.4
0
0
0
0
0
5.0
-14.3
-15.9
-22.3
-20.7
-20.8
-20.8
-20.8
-20.8
-20.8
-20.8
-20.8
-20.8
-20.8
-20.8
-20.8
-20.8
-20.7
-20.8
-20.7
-20.7
-14.3
-15.9
-22.3
-20.7
-22.3
-14.3
-15.9
-20.7
-22.3
-22.3
-14.3
-12.6
-22.3
-22.5
5.0
-15.9
-14.3
-15.9
-17.5
-15.8
-20.7
-22.3
-20.7
-14.3
-15.9
-22.3
-22.3
-20.7
-14.3
-15.9
-22.3
-20.7
-22.3
-14.3
-15.9
-20.7
-22.3
-22.3
-14.3
-12.6
-22.3
-22.3
-22.3
-14.3
-20.7
-15.8
-15.8
-15.8
-15.8
-15.4
INPUT L
52
Display
controller
Segment
digit
select/
output
circuit
Serial
receive
circuit
Digit
output
circuit
Clock
generator
DIG11/
SEG42
51
DIG12/
SEG41
50
DIG13/
SEG40
49
DIG14/
SEG39
48
DIG15/
SEG38
47
DIG16/
SEG37
46
DIG17/
SEG36
45
SEG35
XOUT
6
Vcc1
8
Vcc2
18
Vss
5
Vp
64
XIN
7
CS
SCK
3
SDATA
4
RESET
1
SEG00
44
9
SEG34
SEG26
17
19
SEG25
Segment
output
circuit
Display code
RAM
(8-bit x 60)
CGROM
(35 bit x 166)
CGROM
(35 bit x 16)
code
select
Code
write
Code/
command
control
circuit
DIG00
63
53
DIG10
IC501
: M66003-0131FP
FL display driver
2
data
timing
clock
dot data
write
scan pulse
