Minimum pulse duration
n
You can set a minimum pulse time for the attenuation of short output pulses/pauses.
This suppresses all pulses or pauses shorter than the minimum pulse time. Thus you
may filter very small pulses (spikes), which are not noted from the periphery anymore.
n
Range of values:
0 ... Period duration/2 * 1ms respectively
2 ... Period duration/2 * 0.1ms
n
Default: 2
6.8.3 SFB 49 - PULSE - Pulse width modulation
The SFB 49 is a specially developed block for compact CPUs for
PWM
and
pulse train
output. With the SFB PULSE (SFB 49) the following functionalities are available:
n
PWM (
P
uls
w
idth
m
odulation)
–
Start/Stop via software gate
SW_EN
–
Enabling/controlling of the PWM output
–
Read status bits
–
Request to read/write the internal PWM registers
n
Configurable pulse train output with a maximum of 2 drive jobs
–
Start/Stop via software gate
SW_EN
–
Enabling/controlling of the pulse train output
–
Read status bits
–
Request to read/write the internal pulse train registers
n
Configurable time base (1µs ... 1ms)
When using the block, the following must be observed:
n
The SFB is cyclically to be called with the corresponding instance DB e.g. in OB 1.
n
You have read and write access to the corresponding registers via the SFB 49 job
interface.
n
Per channel you may call the SFB in each case with the same instance DB. Write
accesses to outputs of the instance DB is not permissible.
n
So that a new job may be executed, the previous job must have be finished with
JOB_DONE
= TRUE.
n
The switching between the modes takes place by the presetting of the pulse number
(JOB_ID = 08h/09h). As soon as you specify a pulse number > 0, you switch to the
pulse train mode, otherwise PWM is active.
Please note that some functions of this block are not available in all
CPUs. If you call a functionality that is not supported, you receive the
error message 04FFh ‘Order no. invalid’ as Return value. More about the
supported functions can also be found in the ‘Properties’ of your CPU.
Parameter
Parameter
Declaration
Data type
Address
(Inst.-DB)
Default
Value
Comment
LADDR
INPUT
WORD
0.0
300h
This parameter is not evaluated.
Always the internal I/O periphery is
addressed.
CHANNEL
INPUT
INT
2.0
0
Channel number
SW_EN
INPUT
BOOL
4.0
FALSE
Enable software gate
Description
VIPA System 300S
+
Deployment I/O periphery
Pulse width modulation - PWM > SFB 49 - PULSE - Pulse width modulation
HB140 | CPU-SC | 313-5BF23 | en | 19-01
138
