VSD – Phase C Gate Driver
See Phase A Gate Driver message above.
VSD – Single Phase Input Power
This shutdown is generated by the SCR trigger control and relayed to the VSD Logic Board to
initiate a system shutdown. The SCR Trigger control uses circuitry to detect the loss of any one of
the three input phases. The Trigger will detect the loss of a phase within one half line cycle of the
phase loss. This message is also displayed every time power to the VSD is removed or if the input
power dips to a very low level.
VSD – High DC Bus Voltage
The VSD’s DC Link Voltage is continuously monitored and if the level exceeds 745VDC, a Bus Over-
Voltage shutdown is initiated. If this shutdown occurs, it will be necessary to look at the level of the
460VAC applied to the drive. The specified voltage range is 414 to 508VAC. If the incoming voltage is
in excess of 508VAC, steps should be taken to reduce the voltage to within the specified limits.
VSD – Logic Board Power Supply
This shutdown is generated by the VSD Logic Board and it indicates that the low voltage power
supplies for the Logic Boards have dropped below their allowable operating limits. The power
supplies for the Logic Boards are derived from the secondary of the 120 to 24VAC transformer,
which in turn, is derived from the 480 to 120VAC control power transformer. This message usually
means the power to the VSD has been removed.
VSD – Low DC Bus Voltage
If the DC link drops below 500VDC (or 414VDC for 50 Hz applications), the drive will initiate a system
shutdown. A common cause for this shutdown is a severe sag in the incoming power to the drive.
Monitor the incoming three-phase AC line for severe sags and also monitor the DC link with a
voltmeter.
VSD – Low DC Bus Voltage
(575V/60 Hz applications)
If the DC Link Voltage falls below 600VDC while running, this shutdown is performed.
VSD – DC Bus Voltage Imbalance
The DC link is filtered by many large electrolytic capacitors, rated for 450VDC. These capacitors
are wired in series to achieve 900VDC capability for the DC link. It is important that the voltage be
shared equally from the junction of the center, or series capacitor connection, to the negative bus
and the positive bus. This center point should be approximately ½ of the total DC Link Voltage. Most
actual Bus Voltage Imbalance conditions are caused by a shorted capacitor or a leaky or shorted
IGBT transistor in an output phase bank assembly. This usually indicates the VSD requires service.
VSD – DC Bus Voltage Imbalance
(575V/60 Hz applications)
If the Half DC Link Voltage does not remain within plus or minus 106VDC of the DC Link Voltage
divided by 2 while running, this shutdown is performed.
VSD – Precharge – DC Bus Voltage Imbalance
This message indicates the same as the VSD-DC Bus Voltage Imbalance message above, except the
condition occurred during the prelube period.
VSD – Precharge-DC Bus Voltage Imbalance
(575V/60 Hz applications)
YK-EP Style B Centrifugal Chiller
204
Summary of Contents for YK-EP
Page 2: ...2 YK EP Style B Centrifugal Chiller...
Page 6: ...6 YK EP Style B Centrifugal Chiller...
Page 227: ...Figure 72 Sample printout of Status 227 YK EP Style B Centrifugal Chiller...
Page 228: ...Figure 73 Sample printout of Status cont YK EP Style B Centrifugal Chiller 228...
Page 229: ...Figure 74 Sample printout of Setpoints 229 YK EP Style B Centrifugal Chiller...
Page 230: ...Figure 75 Sample printout of Setpoints cont YK EP Style B Centrifugal Chiller 230...
Page 231: ...Figure 76 Sample printout of Schedule 231 YK EP Style B Centrifugal Chiller...
Page 232: ...Figure 77 Sample printout of a Sales order YK EP Style B Centrifugal Chiller 232...
Page 233: ...Figure 78 Sample printout of a Sales order cont 233 YK EP Style B Centrifugal Chiller...
Page 234: ...Figure 79 Sample printout of History YK EP Style B Centrifugal Chiller 234...
Page 235: ...Figure 80 Sample printout of History cont 235 YK EP Style B Centrifugal Chiller...
Page 236: ...Figure 81 Sample printout of a security log report YK EP Style B Centrifugal Chiller 236...
