3-60
3-61
6. VIDEO Processing BLOCK DIAGRAM
HA_AUDDATA
HA_AUDSTRB
DSS_AUDDATA
DSS_AUDSTRB
TP / Video Decoder /
Format Converter /
Video Display Processor
(LGDT1101C)
Digital
Decoder
4H Com b
Filter
ADC
Clock
Generator
(MK2716S)
VCXO
27 MH z
SEL_DTV/DSS
LPF
SDRAM
(2Mx32bx4)
PH_VDPCLK
YC
Clock Gen.
MUX
(74LCX157)
x 3
VIDEO PIXEL DECODER
VPX3226E
20.25 MHz
X-tal
EPLD
(EPM3032A)
- Clock Gen.
3x Clock
Generator
(ICS501M )
PA_CLK27M
PT_CLK27M
DVI
Transmitter
w/ HDCP
(Sil170)
74.175 MHz
81 MHz
PP_DVICLK
HP_DR/G/B[7..0
]
DVI_HSYNC, DVI_VSYNC
CH0,1,2 +-
CLK +-
I2C Ext.
(82B715)
DDC_DATA
DDC_CLK
DVI Out
YPbPr Out
LPF
(TOKO 25M )
X 3
AMP
(AD8013AR)
AMP
(AD8013AR)
CP_RGB_MUTE
Line Driver
(74HC540)
Video Out
1/2
NTSC
Encoder
(SAA7120)
AMP
(TK15420)
X 2
S-Video Ou t
RGB Out
CVBS_OUT
Sync Sep.
(LM1881M )
PC_V_1881
IC404
IC602
IC406
IC500
IC501~503
IC504~507
X600
IC604~606
IC403
IC612
IC601
JA400
IC613
IC608
IC607
IC609~610
IC611
IC615
X601
CPU_DATA[31..0 ]
CPU_ADDR[12..1 ]
DSS_V_DATA[7..0]
DSS_V_CLK
DSS_V_VALID
VSB_DATA[7..0 ]
VSB_CLK
VSB_VALID
H_BADDR[11..0 ]
H_AADDR[11..0 ]
H_BDATA[63..0]
H_BDATA[63..0]
& control signal s
5V_SDA1
5V_SCL1
3V_SDA1
3V_SCL1
HA_SEL_AUDDATA
HA_SEL_AUDSTRB
3V_SDA1, 3V_SCL1
PH_C/B[7-0]
PH_Y/G[7-0]
HP_VSYNC, HP_HSYNC
COMP_R/G/B
VSYNC, HSYNC
CP_YPbPr_MUTE
COMP_Y/ Pb/Pr
CVBS_AVOUT
CVBS_VCROUT
NTSC_Y/C
3V_SDA1
3V_SCL1
VF_CVBS
HP_MAIN_PWM
PH_NT2CLK
CP_HD/SD
PH_SYSCLK
to CH _ RF Modulator
(TU301)
Summary of Contents for HD-SAT520
Page 8: ...3 8 Fig 01 Fig 02 Fig 03 Fig 04 Fig 05 Fig 06 Fig 07 Fig 08...
Page 14: ...3 14 Fig 12 Fig 13...
Page 39: ...3 39 FIG 01 FIG 02 FIG 03 FIG 04 FIG 05...
Page 105: ...3 68 3 69 2 FRONT CIRCUIT DIAGRAM...
Page 106: ...3 70 3 71 3 CPU 1 CIRCUIT DIAGRAM...
Page 107: ...3 72 3 73 4 CPU 2 CIRCUIT DIAGRAM...
Page 108: ...3 74 3 75 5 TERRESTRIAL CIRCUIT DIAGRAM...
Page 109: ...3 76 3 77 6 DVI TRANSMITTER NTSC ENCODER CIRCUIT DIAGRAM...
Page 110: ...3 78 3 79 7 ATSC TP DEMUX VD XDO CIRCUIT DIAGRAM...
Page 111: ...3 80 3 81 8 VDP I F DISPLAY CIRCUIT DIAGRAM...
Page 112: ...3 82 3 83 9 AUDIO DECODER SPDIF CIRCUIT DIAGRAM...
Page 113: ...3 84 3 85 10 NTSC AUDIO PROCESSOR CIRCUIT DIAGRAM...
Page 114: ...3 86 3 87 11 POWER DSS FRONT CIRCUIT DIAGRAM...
Page 115: ...3 88 3 89 12 DIRECTV TP DEMUX CIRCUIT DIAGRAM...
Page 116: ...3 90 3 91 13 SMART CARD I F CIRCUIT DIAGRAM 1...
Page 117: ...3 92 3 93 14 SMART CARD I F CIRCUIT DIAGRAM 2...
Page 118: ...3 94 3 95 PRINTED CIRCUIT DIAGRAMS 1 DIGITAL MAIN P C BOARD BOTTOM...
Page 119: ...3 96 3 97 2 DIGITAL MAIN P C BOARD TOP...
Page 120: ...3 98 3 99 3 POWER P C BOARD 4 KEY P C BOARD 5 KEY P C BOARD LOCATION GUIDE...