3-54
3-55
8) PVR BLOCK DIAGRAM
PDR-Pro
304 PQFP
VSB_ TP[0:7] &CLK
PCI Bus
33M H z
VSB_TP[0:7]
& Control Signals
from VSB part
ADR_B
[0:10]
PCI-IDE
Controller
PCI0649
PVR CPLD
[EPM3128A]
ADR_
A
[0:10]
DATA_
B
[0:
3
1]
DATA_
A
[0:
3
1]
TP_OUT[0:7]
& Control Signals
to HD-1
PCI I/F Signals
From CPU
TP_OUT[0:7] &
Control Signals
UP SDRAM
2Mx32bit
[K4S643232]
DN SDRAM
2Mx32bit
[K4S643232]
FIFO
512byte
[IDT72V211]
E-IDE I/F
Connector
HDD
Summary of Contents for HDR230
Page 28: ......
Page 34: ......
Page 37: ......
Page 38: ...3 17 3 18 4 WAVEFORMS 1 DIGITAL SYSTEM CLOCK GENERATOR PART 1 2 3...
Page 39: ...3 19 3 20 2 DIGITAL SYSTEM SYSTEM MEMORY PART 1 2 3...
Page 40: ...3 21 3 22 3 VIDEO PLL PART 1 2...
Page 41: ...3 23 3 24 4 VIDEO OUTPUT CONNECTOR PART 1 2 3 BMK800 BMK800 BMK800 33PF 33PF 33PF...
Page 43: ...3 27 3 28 6 PVR CLOCK PART 1 2 3...
Page 44: ...3 29 3 30 7 VSB VSB DECODER PART 1...
Page 45: ...3 31 3 32 8 VSB DOWN CONVERTER PART 1...
Page 46: ...3 33 3 34 9 MICOM DOWN CONVERTER PART 1...
Page 47: ......
Page 65: ...3 74 3 75 10 VSB CIRCUIT DIAGRAM IF VSB TP Data clock error valid 03 3 15 HDR230 DNS...
Page 67: ...3 78 3 79 12 POWER IF COM VIDEO CIRCUIT DIAGRAM CVBS OUT Y OUT C OUT 03 3 15 HDR230...
Page 68: ...3 80 3 81 13 FRONT CIRCUIT DIAGRAM RIGHT LEFT 03 3 15 HDR230...
Page 69: ...3 82 3 83 8 PRINTED CIRCUIT DIAGRAMS 1 DIGITAL MAIN PRINTED CIRCUIT DIAGRAMS TOP...
Page 70: ...3 84 3 85 2 DIGITAL MAIN PRINTED CIRCUIT DIAGRAMS BOTTOM...
Page 72: ...3 88 3 89 5 POWER PRINTED CIRCUIT DIAGRAM LOCATION GUIDDE...
