85
CIRCUIT DESCRIPTION
Automatic Brightness Limiter (ABL) Circuit Block Diagram Explanation
The ABL voltage is generated from the ABL pin of the Flyback transformer, TH01. The ABL pull-up
resistors are RH58 and RH59. They receive their pull up voltage from the B+ 120V(V2 ) for Deflection line
generated from the Power Supply via TP91 pin 13, rectified by DP11, filtered by CP33 and then routed
through the excessive current sensing resistor RP17.
ABL VOLTAGE OPERATION
The ABL voltage is determined by the current draw through the Flyback transformer. As the picture bright-
ness becomes brighter or increases, the demand for replacement of the High Voltage being consumed is
greater. In this case, the flyback will work harder and the current through the Flyback increases. This in turn
will decrease the ABL voltage. The ABL voltage is inversely proportionate to screen brightness.
Also connected to the ABL voltage line is DH33. This zener diode acts as a clamp for the ABL voltage. If
the ABL voltage tries to increase above 12V due to a dark scene which decreases the current demand on
the flyback, the ABL voltage will rise to the point that DH33 dumps the excess voltage into the 12 line.
ACCL TRANSISTOR OPERATION
The ABL voltage is routed through the PSD3 connector, through the PSZ2 connector, to the base of QX13.
Under normal conditions, this transistor is nearly saturated. QX13 determines the voltage being supplied to
the cathode of DX05, which is connected to pin 45 of the Rainforest IC, IX01. During an ABL voltage
decrease, due to an excessive bright circumstance, the base of QX13 will go down, this will drop the
emitter voltage which in turn drops the cathode voltage of DX05. This in turn will pull voltage away from pin
45 of the Rainforest IC, IX01. Internally, this reduces the contrast and brightness voltage which is being
controlled by the
I 2 C
bus data communication from the Microprocessor arriving at pin 27 and 28 of the
Rainforest IC and reduces the overall brightness, preventing blooming.
SUB BRIGHTNESS ADJUSTMENT - I 2 C Alignment
The purpose for the Sub Brightness Adjustment alignment is to set up the Lowest DC level to which the
Brightness control voltage can be set. Again, this voltage is controlled internally within IX01 via
I 2 C
bus
data. The adjustment is performed within the Service Menu. To enter this adjustment menu, with the set
turned off, press and hold the Input button, then press the Power button. This will bring up a Service Menu.
Under the P.01 menu, the 1st selection is Sub Bright Adj. Selection is made using the pq buttons and
adjusting the data values are made using the tu buttons.
Sweep Loss Detection Block Diagram Explanation
The key component in the Sweep Loss Detection circuit is QN04. This transistor is normally biased off.
When the base becomes more negative, it will be turned on, causing the Standby 11V to be applied to two
different circuits, the
Spot
circuit and the
High Voltage Drive
circuit.
SPOT CIRCUIT
When QN04 is turned on, the 11V standby will be applied to the anode of DN11, forward biasing it. This
voltage will then pass through DN11, get zenered by DN09, and go to pin 2 of PSD3, where it will activate
the Video Mute circuitry Q022 - Q024 on the Signal PWB. This is done to prevent CRT burn. Another
input to this circuit is the I701 DAC3 line. This will activate when accessing certain adjustment parameters in
the service mode; i.e. turning off vertical drive for making CRT drive or cut-off adjustments.