Advantech MI/O-128, Design Manual

Page 1: ...1 MI O 128 Single Board Computer Design Guide V1 0 June 2018 ...

Page 2: ...d another is SMD type for I O extension refer to Figure 1 1 This interface including power input inverter output VGA USB 2 0 GPIO and RS 232 can implement low speed functions directly This chapter will show all the pin description Figure 1 1 DIP 64 Pin Connector A SMD 64 Pin Connector B ...

Page 3: ...nverter 5V Output 14 GND 15 Inverter ENBKL 16 Inverter VBR 17 Inverter 12V Output 18 GND 19 GND 20 GND 21 GND 22 GND 23 VGA DDC DAT 24 VGA DDC CLK 25 VGA RGB GND 26 VGA RGB GND 27 VGA Red 28 VGA Green 29 VGA Blue 30 VGA RGB GND 31 VGA GND 32 VGA 5V Output 33 VGA HSYNC 34 VGA VSYNC 35 GND 36 GND 37 GND 38 GND 39 USB 5V Output 40 USB 5V Output 41 USB0 D 42 USB1 D ...

Page 4: ... 50 GND 51 LAN LINK100 LED 52 LAN LINK1000 LED 53 LAN ACT LED 54 LAN ACT LED 55 LAN BI_DA 56 LAN BI_DA 57 LAN BI_DB 58 LAN BI_DB 59 LAN BI_DC 60 LAN BI_DC 61 LAN BI_DD 62 LAN BI_DD 63 LAN Chassis GND 64 LAN Chassis GND Table 1 1 Pin Description of DIP 64 Pin Connector ...

Page 5: ...Output 11 SMB DAT 12 SMB CLK 13 I2C DAT 14 I2C CLK 15 GPIO 5VSB Output 16 GPIO4 17 GPIO0 18 GPIO5 19 GPIO1 20 GPIO6 21 GPIO2 22 GPIO7 23 GPIO3 24 GND 25 USB 5V Output 26 USB 5V Output 27 USB0 D 28 USB1 D 29 USB0 D 30 USB1 D 31 GND 32 GND 33 USB Chassis GND 34 NC 35 AUDIO LOUTR 36 AUDIO LINR 37 AUDIO GND 38 AUDIO GND 39 AUDIO LOUTL 40 AUDIO LINL 41 AUDIO GND 42 AUDIO GND 43 AUDIO MICR 44 AUDIO MICL...

Page 6: ...RTS 49 COM1 422RX TXD 50 COM1 CTS 51 COM1 422RX DTR 52 COM1 RI 53 GND 54 GND 55 COM2 422TX 485D DCD 56 COM2 DSR 57 COM2 422TX 485D RXD 58 COM2 RTS 59 COM2 422RX TXD 60 COM2 CTS 61 COM2 422RX DTR 62 COM2 RI 63 GND 64 GND Table 1 2 Pin Description of SMD 64 Pin Connector ...

Page 7: ...on SMD Pin Name Pin Type Power Rail Description 35 AUDIO LOUTR Output 1 2Vrms LINE R Output 37 AUDIO GND Audio GND Audio GND Audio GND 39 AUDIO LOUTL Output 1 2Vrms LINE L Output 41 AUDIO GND Audio GND Audio GND Audio GND 43 AUDIO MICR Input 1 5Vrms MIC R Input 36 AUDIO LINR Input 1 5Vrms LINE R Input 38 AUDIO GND Audio GND Audio GND Audio GND 40 AUDIO LINL Input 1 5Vrms LINE L Input 42 AUDIO GND ...

Page 8: ...pplication I O Board EMI Solution R1 0 5 0603 GND AGND CN CPU Board AGND Pink CN26 JACK_5H Characteristic JACK5P φ3 5 5 4 3 2 1 MICL MICR C60 1000pF 50V 0402 C209 1000pF 50V 0402 B50 600_100MHz 0 5A 0603 B51 600_100MHz 0 5A 0603 MIC in AGND AGND GND_Chasis Line in LINL LINR C38 1000pF 50V 0402 C39 1000pF 50V 0402 B38 600_100MHz 0 5A 0603 B39 600_100MHz 0 5A 0603 Blue CN27 JACK_5H Line in JACK5P φ3...

Page 9: ...D Analog GND Analog GND VGA RGB Ground 27 VGA Red Output 0 7Vp p Red Analog Video Output 29 VGA Blue Output 0 7Vp p Blue Analog Video Output 31 VGA GND GND GND GND 33 VGA HSYNC Output 3 3V VGA Hsync Output 24 VGA DDC CLK I O 5V VGA DDC Clock 26 VGA RGB GND GND Analog GND VGA RGB Ground 28 VGA Green Output 0 7Vp p Green Analog Video Output 30 VGA RGB GND GND Analog GND VGA RGB Ground 32 VGA 5V Outp...

Page 10: ...protection and therefore ESD and EMI solutions close to connector are must for VGA port Figure 1 2 1 1 Demonstration for VGA Application C7 100pF 50V 0402 C8 10pF 50V 0402 C9 10pF 50V 0402 VGA_y _DDAT VGA_y _VS VGA_y _HS VGA_y _DCLK C10 100pF 50V 0402 B5 600_100MHz 0 3A 0402 R1 0 5 0402 R2 0 5 0402 B6 600_100MHz 0 3A 0402 VGA_DDC_DAT VGA_VS VGA_HS VGA_DDC_CLK GND_Chasis GND_Chasis CPU Board I O Bo...

Page 11: ...scription 39 USB 5V Output Power Output 5VSB USB Power 500mA 41 USB0 D I O USB2 USB2 Data 43 USB0 D I O USB2 USB2 Data 45 GND GND GND GND 47 USB Chassis GND GND GND GND 40 USB 5V Output Power Output 5V USB Power 500mA 42 USB1 D I O USB2 USB2 Data 44 USB1 D I O USB2 USB2 Data 46 GND GND GND GND 48 NC Table 1 3 1 1 Signal Description for USB in DIP 64 Pin SMD Pin Name Pin Type Power Rail Description...

Page 12: ...acitance which should be less than 1 0pF are the recommendatory solution For placement concern EMI and ESD solution should be close to connector Figure 1 3 2 1 EMI and ESD demonstration for USB Application GND_Chasis GND_Chasis USB_D USB_D USB_z_D CN29 5V 1 DATA 2 DATA 3 GND 4 PTH_1 5 PTH_2 6 B52 90_100MHZ 1 4 2 3 D6 AZC099 1 2 3 4 6 5 C210 0 1uF 16V V5_USB C211 0 1uF 16V V5_USB ESD Protection clo...

Page 13: ...o RS232 RS422 RS485 Standard 422TX 485D DCD 47 COM1 422TX 485D RXD 422TX 485D RXD 49 COM1 422RX TXD 422RX TXD 51 COM1 422RX DTR 422RX DTR 53 GND GND GND GND 55 COM2 422TX 485D DCD Refer to RS232 RS422 RS485 Standard Refer to RS232 RS422 RS485 Standard 422TX 485D DCD 57 COM2 422TX 485D RXD 422TX 485D RXD 59 COM2 422RX TXD 422RX TXD 61 COM2 422RX DTR 422RX DTR 63 GND GND GND GND 46 COM1 DSR Refer to...

Page 14: ...ad and capacitors are the recommendatory solution For placement concern EMI solution should be close to connector Figure 1 4 2 1 EMI demonstration for RS 232 Application I O Board EMI Solution CPU Board CN B22 600_100MHz 0 3A 0402 B23 600_100MHz 0 3A 0402 B24 600_100MHz 0 3A 0402 B25 600_100MHz 0 3A 0402 DCD B26 600_100MHz 0 3A 0402 B27 600_100MHz 0 3A 0402 DSR RTS RXD B28 600_100MHz 0 3A 0402 DTR...

Page 15: ...ive LED 55 LAN BI_DA I O DATA A 57 LAN BI_DB I O DATA B 59 LAN BI_DC I O DATA C 61 LAN BI_DD I O DATA D 63 LAN Chassis GND GND GND GND 52 LAN LINK1000 LED Define by LAN Chip 3 3V 1000Mb s LED 54 LAN ACT LED Define by LAN Chip 3 3V LAN Active LED 56 LAN BI_DA I O DATA A 58 LAN BI_DB I O DATA B 60 LAN BI_DC I O DATA C 62 LAN BI_DD I O DATA D 64 LAN Chassis GND GND GND GND Table 1 5 1 1 Signal Descri...

Page 16: ...LED_G O G TX 1 TX 2 RX 3 NC1 4 NC2 5 RX 6 NC3 7 NC4 8 NPTH_1 H1 NPTH_2 H2 LED2_ G 9 LED2_ G 10 LED1_ G O 12 LED1_ G O 11 PTH_1 H3 PTH_2 H4 LAN_LINK1000_LED GND_Chasis LAN_LINK100_LED LAN BI_DA LAN_ACT_LED LAN_ACT_LED LAN BI_DB LAN BI_DB LAN BI_DA LAN BI_DC LAN BI_DC LAN BI_DD LAN BI_DD ...

Page 17: ...er Input 12V Power input for MB 9 GND GND GND GND 11 GND GND GND GND 13 Inverter 5V Output Power Output 5V Power output for Inverter Board 1A 15 Inverter ENBKL Output 5V LCD Panel Backlight Enable 17 Inverter 12V Output Power Output 12V Power output for Inverter Board 500mA 19 GND GND GND GND 21 GND GND GND GND 2 GND GND GND GND 4 GND GND GND GND 6 GND GND GND GND 8 GND GND GND GND 10 GND GND GND ...

Page 18: ...GPIO 5VSB Output Power Output 5VSB Power output for GPIO 500mA 17 GPIO0 I O 5VSB GPIO with Internal pull up to 5VSB 19 GPIO1 I O 5VSB GPIO with Internal pull up to 5VSB 21 GPIO2 I O 5VSB GPIO with Internal pull up to 5VSB 23 GPIO3 I O 5VSB GPIO with Internal pull up to 5VSB 2 Power LED LED 5V Power LED 4 Power LED GND GND Power LED 6 HDD LED LED 3 3V HDD LED 8 HDD LED LED 3 3V HDD LED 10 SMB 5V Ou...

Page 19: ...SB GPIO with Internal pull up to 5VSB 20 GPIO6 I O 5VSB GPIO with Internal pull up to 5VSB 22 GPIO7 I O 5VSB GPIO with Internal pull up to 5VSB 24 GND GND GND GND Table 1 6 1 2 Signal Description for Others in SMD 64 Pin ...

Page 20: ...uce the length of signals that are routed parallel Provide analog signals with guard shields or guard rings Keep analog signals away from digital signals 1 7 3 Reference Planes The high frequency return path for any signal lies directly beneath the signal on the adjacent layer Providing a solid plane underneath a signal greatly reduces problems with signal integrity timing and EMI because the plan...

Page 21: ...lose as possible to the signal via as shown in Figure 1 7 2 Figure 1 7 2 Ground Stitching Via Trace Crossing Plane Splits Stitching Cap Reference Plane 1 Side View Reference Plane 2 Trace Trace TOP View Trace Trace Reference Plane 1 Reference Plane 2 Signal Via Signal Via Stitching Via TOP Microstrip BOT Microstrip Ground Stitching Via Side View GND Plane Stitching Via TOP Microstrip TOP View GND ...

Page 22: ...st practical to route the TX signal and the RX signal of that lane next to each other on the same layer Differential Pair length matching should be maintained segment to segment Examples of segments might include breakout areas route to connect vias route to connect a connector and so forth Figure 1 7 4 length matching example When trace length matching compensation occurs it should be made as clo...

Page 23: ... match lengths the following guidelines should be maintained The trace spacing should not become greater than 2 times the original spacing The length of the increased spacing should not be greater than 3 times the trace width Figure 1 7 6 serpentine rule Match near mismatch Avoid w 3w s 2s ...