Curtiss-Wright C312-00, User Manual

Page 1: ...NVIDIA Jetson TX2i Modular Mission Computer USER MANUAL DuraCOR 312 ...

Page 2: ...Wright This document contains proprietary information that is protected by copyright All rights are reserved No part of this document may be photocopied reproduced or translated into another language without the prior written consent of Curtiss Wright Contact Information Curtiss Wright Defense Solutions Division 3222 S Washington St Salt Lake City Utah USA 84115 T 1 801 483 1533 Toll Free 1 800 48...

Page 3: ...nded Equipment 15 Breakout Cable Set 15 Power on Sequence 15 Chapter 3 Connector Descriptions 16 Connector Identification 16 Connector Pinouts 17 J1 Power Connector 17 J2 I O Connector 18 J3 I O Connector 20 J4 Configurable I O Connector 22 Optional Internal IO Expansion Connectors 23 Chapter 4 Operational Description 25 PCIe 25 Mini PCIe Expansion 25 Installing Mini PCIe Cards into the DuraCOR 31...

Page 4: ...Test BIT 34 Flashing OS Image 34 Chapter 5 Specifications 35 Technical Specifications 35 Multi Core Arm Pascal GPU 35 Standard I O Interfaces 35 I O Expansion 36 Operating System 36 Storage 36 Mechanical Specifications 36 Physical 36 Dimensions 37 Mounting the System 37 Power 37 Environmental Specifications 38 Temperature 38 Shock Vibration 38 EMI EMC Compliance 38 Operating Conditions 38 Other Sp...

Page 5: ...figurations 42 NVIDIA Documentation 42 Appendix B 43 BIT Port 43 High Temperature Operation 44 Appendix C 48 Linux Software Development 48 Instructions for setting up a project directory 49 Description of source files 49 Overview 50 Detailed instructions 50 How to deploy an image to C312 54 Additional Notes 54 Appendix D 56 LAN 7800 Notes 56 Glossary 58 ...

Page 6: ...J2 Front Pinout 18 Figure 5 DuraCOR 312 J3 Front Pinout 20 Figure 6 DuraCOR 312 J4 Front Pinout 23 Figure 7 PCIe Lane Mapping 25 Figure 8 Mini PCIe Cards from various Manufactureres 26 Figure 9 Card Slot Identification Mini PCIe Slot 1 top card left image Mini PCIe Slot 2 bottom card left image SOM TX2i right image and M 2 card right image 27 Figure 10 SSD Removable Tray 28 Figure 11 PCIe USB 3 0 ...

Page 7: ...aCOR 312 Standard Configurations 11 Table 2 Chip List 13 Table 3 DuraCOR 312 Connector Identification Table 16 Table 4 J1 Connector Information 17 Table 5 J1 Pinout 17 Table 6 J2 Connector Information 18 Table 7 J2 Pinout 19 Table 8 J3 Connector Information 21 Table 9 J3 Pinout 21 Table 10 J4 Connector Information 23 ...

Page 8: ...s power hold up in a fan less IP67 rated mechanical package designed for wide temperatures and harsh shock and vibration About This Document Manual Organization This manual provides functional and technical descriptions of the DuraCOR 312 hardware instructions on connecting the system to test equipment connector descriptions and pinouts and specifications Chapter 1 provides an introduction and fun...

Page 9: ...f 59 Caution Hazard to individuals environment devices or data If you do not adhere to the safety advice next to this symbol there is obvious hazard to individuals to environment to materials or to data Note This symbol highlights important information or instructions that should be observed ...

Page 10: ...t of base I O which include Ethernet CAN serial USB DIO and video ports The unit comes with on board eMMC Flash and supports an optional internal M 2 SSD NVMe SATA as well as optional removable 2 5 SATA SSD storage for high capacity storage and information assurance requirements Like other DuraCOR models the 312 leverages both an ecosystem of rugged COTS Mini PCIe modules including MIL STD 1553 an...

Page 11: ...cription C312 00R DuraCOR 312 NVIDIA Jetson TX2i 32 GB onboard flash storage no M 2 mSATA Removable 2 5 SSD storage bay disk and tray sold separately C312 00 DuraCOR 312 NVIDIA Jetson TX2i 32 GB onboard flash storage no M 2 mSATA C312 01 DuraCOR 312 NVIDIA Jetson TX2i 32 GB onboard flash storage 32 GB M 2 storage C312 03 DuraCOR 312 NVIDIA Jetson TX2i 32 GB onboard flash storage 64 GB M 2 storage ...

Page 12: ...integrates a NVIDIA Jetson TX2i module The base system comes pre installed with the Linux 4 Tegra L4T with the LTS Linux Kernel on the 32 GB onboard flash The system also integrates an additional ring to house a removable 2 5 SSD Example ordering code C312 00R DuraCOR 312 NVIDIA Jetson TX2i 32 GB onboard flash storage no M 2 mSATA Removable 2 5 SSD storage bay disk and tray sold separately System ...

Page 13: ...nt TUSB8041IPAPRQ1 Audio Stereo Codec Freescale SGTL5000XNA Microcontroller ARM Microcontroller Freescale MK60DN512 Shared Resources and Connectors Location To accommodate different configurations the following shared resources are explained below M 2 The intended use of this socket is primarily M 2 storage SSD NVMe or an additional mini PCIe using adapter card SATA mSATA M 2 SATA P3503 and P3503b...

Page 14: ...DuraCOR 312 Chapter 1 Introduction Page 14 of 59 MNL 0670 01 Rev A2 ECO 5931 Effective 03 Jun 20 Figure 2 SATA Expansion ...

Page 15: ...ht to support lab or bench testing purposes A custom set of cables may be made specifically for the intended target system vehicle or craft refer to Chapter 3 on Connector Descriptions for connector pinouts and descriptions Power on Sequence To power on the DuraCOR 312 follow these steps 1 Connect a power cable to port J1 on the DuraCOR 312 use the cable from the breakout cable set or an equivalen...

Page 16: ...ector Identification Table Receptacle Use Receptacle Label of Pins Wire Gauge AWG Amphenol Glenair Jam Nut Receptacle Part Number Amphenol Glenair Mating Connector Part Number Power J1 3 22 28 2M801 033 07M5 3PA 801 033 07M5 3PA 2M801 008 16M5 3SA 801 008 16M5 3SA I O J2 55 22 28 2M801 033 07M16 55SA 801 033 07M16 55SA 2M801 008 16M16 55PA 801 008 16M16 55PA I O J3 55 22 28 2M801 033 07M16 55SB 80...

Page 17: ...Curtiss Wright all EMI and EMC consideration must be handled by the customer J1 Power Connector Figure 3 DuraCOR 312 J1 Front Pinout Table 4 J1 Connector Information Receptacle Use Receptacle Label of Pins Wire Gauge AWG Amphenol Glenair Jam Nut Receptacle Part Number Amphenol Glenair Mating Connector Part Number Power J1 3 22 28 2M801 033 07M5 3PA 801 033 07M5 3PA 2M801 008 16M5 3SA 801 008 16M5 ...

Page 18: ... ESD protection could compromise the signal quality of the audio signals Caution ESD Sensitive Components Follow standard ESD and FOD controls to avoid damage to the internal components Figure 4 DuraCOR 312 J2 Front Pinout Table 6 J2 Connector Information Receptacle Use Receptacle Label of Pins Wire Gauge AWG Amphenol Glenair Jam Nut Receptacle Part Number Amphenol Glenair Mating Connector Part Nu...

Page 19: ...bE1 J2_13 GND USB3 0 p1 Gnd J2_41 GbE_P1_A_P Note 1 GbE1 J2_14 USB3_TP2_P USB3 0 p2 Tx J2_42 USB3_RP3_P USB3 0 p3 Rx J2_15 USB3_P2_N Note 2 USB2 0 p2 D J2_43 USB3_P3_N USB2 0 p3 D J2_16 USB3_P2_P Note 2 USB2 0 p2 D J2_44 LINE_IN_R Audio LineIn R J2_17 GbE_P2_D_P Note 1 GbE2 J2_45 LINE_OUT_R Aud Line Out R J2_18 GbE_P2_D_N Note 1 GbE2 J2_46 LINE_OUT_L Aud Line Out L J2_19 GbE_P2_C_P Note 1 GbE2 J2_...

Page 20: ...ver puts the nVidia module into a force recovery mode to receive new boot loader and OS software via port 0 J3 I O Connector J3 contains HDMI RS232 422 483 Serial ports 8x GPIO signals CAN ports Remote on off Write protect and GPIO Caution ESD Sensitive Components Follow standard ESD and FOD controls to avoid damage to the internal components Figure 5 DuraCOR 312 J3 Front Pinout ...

Page 21: ...2 CTS1 In Bi RS232 485 422 Port 2 J3_9 CAN1_P Bidir CANBUS1 J3_37 GND GND Additional GND J3_10 GPIO8 Note 1 GPIO J3_38 GND GND CANBUS2 GND J3_11 GPIO7 Note 1 GPIO J3_39 28V_RTN_IN Note 2 Remove Off RTN J3_12 GPIO6 Note 1 GPIO J3_40 GND GND HDMI GND J3_13 GND GND GPIO GND J3_41 GND GND HDMI GND J3_14 DEBUG_TXD Output TX2i CONSOLE J3_42 HDMI_D1_N HDMI J3_15 DEBUG_RXD Input TX2i CONSOLE J3_43 HDMI_D1...

Page 22: ...ding use the recommended ground function to make cable wiring a little less complicated Not all cables require a ground wire CANBUS RS485 and RS422 for examples J4 Configurable I O Connector J4 contains up to 55x configurable IO pins The J4 connector may be changed to any insert configuration available for the 801 2M801 series shell 16 connector by either Glenair Amphenol or compatible alternative...

Page 23: ...nformation Receptacle Use Receptacle Label of Pins Wire Gauge AWG Amphenol Glenair Jam Nut Receptacle Part Number Amphenol Glenair Mating Connector Part Number Configurable I O J4 55 22 28 2M801 010 07M16 55SC 801 010 07M16 55SC 2M801 008 16M16 55PC 801 008 16M16 55PC Optional Internal IO Expansion Connectors See Chapter 4 for the functional details of each interface ...

Page 24: ...toring dangerous charges Although there are safety measures designed into the system It is best to remove power and wait 1 minute before removing the baseplate SAFETY NOTE FOR UNITS WITH HOLDUP CAPACITOR OPTION Disconnecting the holdup capacitor while the system is powered will cause the capacitor to retain a potentially lethal charge Do not disconnect while the system is powered Do not touch the ...

Page 25: ...2 PCIe 0 is routed to the M 2 slot These lanes can be used for the NVMe storage or additional PCIe based interfaces PCIe 1 and PCIe 2 are routed to the mPCIe slots 1 and 2 respectively These are used for additional PCIe based interfaces Figure 7 PCIe Lane Mapping Mini PCIe Expansion The DuraCOR 312 Mission Computer provides a powerful and flexible platform to integrate a variety of devices based o...

Page 26: ...ew with thread locker such as Loctite 222 to secure card to motherboard 3 Connect the corresponding cable from the mini PCIe card to the expansion pins of the DuraCOR 312 J4 connector as required a A custom cable is required See Integrating mini PCIe Cards and Chapter 3 for available I O options 4 Close the unit and tighten screws to 34 4 in oz 0 24 Nm Use a thread locker such as Loctite 222 Integ...

Page 27: ...f environments This section describes the various storage options for the DuraCOR 312 Non Volatile Memory Express NVMe M 2 Socket The DuraCOR 312 contains an M 2 B key for use with an M 2 B M key with a single x1 or dual x2 PCIe lane card As mentioned above the PCIe lanes are Gen 2 approximately 500 MBps per lane The NVMe drives are intended to hold user data the operating system or both The syste...

Page 28: ...ite 222 Remove the door and place the drive and tray assembly on the door Slide the assembly into the system with the words and symbols toward the top of the unit The removable storage device can only be inserted in to the system in one direction Tighten the thumbscrews Ensure both thumbscrews are tight otherwise the system may not be watertight The use of a screwdriver may be required to ensure f...

Page 29: ...ts are routed to each of the mPCIe ports for optional USB based interfaces The fourth port is routed to the NXP microcontroller for firmware updates and BIT log information USB 3 0 There is one 1 USB 3 0 port from the TX2i module This is the USB_SS 1 interface is the DuarCOR 312 default configuration Config 5 To increase functionality to the system for the user the addition of a USB 3 0 hub was im...

Page 30: ...orts flash memory of the C312 See Appendix B Bit Port To connect to the console port configure the host computer using the following settings on a serial terminal emulator i e minicom teraterm etc Baud 115200 Data 8 bit Parity None Stop 1 Flow Control off Console The console is a RS 232 port using TX RX and GND only No other signals are required The console port can be used to configure the DuraCO...

Page 31: ... Chapter 4 Operational Description MNL 0670 01 Rev A2 ECO 5931 Effective 03 Jun 20 Page 31 of 59 Baud 115200 Data 8 bit Parity None Stop 1 Flow Control off The TX2i module enumerates these ports as ttyS0 and ttyS1 ...

Page 32: ...f desired check to see that the CAN modules were installed correctly ifconfig Open a 2nd terminal window to show received test data for port can0 in that terminal type candump can0 Open a 3rd terminal window to show received test data for port can1 in that terminal type candump can1 Return to the 1st terminal window Use cansend can_interface can_frame to send a CAN data packet cansend can0 123 dea...

Page 33: ...le to switch the microphone jack to be a connection for the SGTL5000 Line In This is not a supported configuration 1 Please see the Nvidia documentation for specifics on the other audio interfaces provided by the TX2i modules such as audio output through HDMI HDMI The default system configuration exposes a single HDMI interface through J3 This port can be connected to any HDMI capable display Cont...

Page 34: ...eroization Zeroization can be implemented via GPIO This approach allows for flexibility on what data to sanitize and can vary depending on the storage configuration Contact slp_tsupport curtisswright com for information about Zeroization methods Built In Test BIT See Appendix B Flashing OS Image See Appendix C ...

Page 35: ...nce 750 GFLOPS 32 bit single precision floating point FP32 performance 128 bit DRAM memory o 8 GB LPDDR4 with Error Correcting Code ECC memory support on TX2i early access units with TX2 have nonECC memory Security o Configurable secure DRAM memory for code and data protection o Hardware acceleration for AES 128 192 256 encryption decryption for secure boot o TrustZone technology support for DRAM ...

Page 36: ...and NVIDIA s development tool chain including JetPack Deep AI learning for neural network applications Storage 1 x eMMC 5 1 Flash on SOM module 32 GB capacity 1 x M 2 NGFF SSD SATA or x1 x2 PCIe o M 2 PCI Express or SATA SSD in 2260 2280 form factors with 75 position B or B M key up to 512 GB 1 TB capacities Optional removable 2 5 SATA SSD in add on mechanical segment 64 GB to 8 TB capacity Mechan...

Page 37: ...spikes surges for normal transfer abnormal emergency starting and power failure o Optional support for 50 ms power hold up capacitance per MIL STD 704 for aircraft power switch over requirements MIL STD 1275D 28 VDC compliant for ground vehicle operation steady state DC voltage variations no fault single fault conditions ripple voltage susceptibility on input power leads imported voltage spikes ov...

Page 38: ...ofile EMI EMC Compliance Qualification testing pending for MIL STD 461F DO 160 and CE Mark Conducted Emissions MIL STD 461F CE102 Power Leads 10 KHz to 10 MHz Basic Curve Fig CE102 1 Conducted Susceptibility MIL STD 461F CS101 Power Leads 30 Hz to 150 KHz Curve 2 Figure CS101 1 28V and below CS114 Bulk Cable Injection 10 k 200 MHz Curve 3 Figure 1 CS115 Bulk Cable Injection Impulse Excitation Impu...

Page 39: ...rogram NVIDIA TX2i and other system components are industrial temperature rated No moving parts No fan nor cold plate required Conformal coated PCBs for humidity tin whisker mitigation Mean Time Between Failure MTBF calculated per MIL HDBK 217F see qualification test report Export jurisdiction ITAR free EAR controlled ECCN 5A001 A1 Regulatory compliance European CE Mark including EN55022 EN55024 R...

Page 40: ...eturning for Service Before returning any Parvus product please fill out a Return Material Authorization RMA request form available for download from the following website under the support section www curtisswrightds com Email this form to the Technical Support email address slp_tsupport curtisswright com to receive authorization for shipment An RMA number will be emailed back to you as soon as p...

Page 41: ...Curtiss Wright Defense Solutions Division 3222 S Washington St Salt Lake City Utah USA 84115 T 1 801 483 1533 F 1 801 483 1523 www curtisswrightds com Sales T 1 800 483 3152 or 1 801 483 1533 slp_sales curtisswright com Product Technical Support T 1 801 433 6322 slp_tsupport curtisswright com Customer Feedback slp_feedback curtisswright com ...

Page 42: ... system does not support other NVIDIA supported configurations Figure 11 PCIe USB 3 0 Lane Mapping Configurations NVIDIA Documentation NVIDIA has a number of supporting documents available for download from their website https developer nvidia com embedded computing The user must register on the NVIDIA site to gain access to these documents For any Jetson TX2i specific needs refer to the NVIDIA pu...

Page 43: ...at 115 2KB per second no stop bits At startup you get this display Parvus Bootloader V1 4 SFT 0777 01 Rev A9 0x00008000 0x00020fff bc blank check dc delete code fs Save To Flash go show version kb print BIT values ss 0 232 485_1 ts 1 us 0 232 485_2 vs 1 ws 0 Term1 ys 1 mm 0 Term2 nn 1 oo 0 HalfD1 pp 1 qq 0 Fast rr 1 uC Flash Memory Commands bc blank check Checks the internal memory of the uC dc de...

Page 44: ...1C external box temperature but the higher temperatures can only be achieved with some form of thermal management most notably for the GPU section of the TX2i The typical method to accomplish this is throttling the GPU clock rates In addition the ARM cores can also be throttled In testing we have noticed that throttling was required at temperatures in excess of 55C and was highly dependent on the ...

Page 45: ... Throttling 0 system sudo jetson_clocks restore ATP jetson_clocks_New conf recordError Throttling ON Throttling 1 else if Temperaturei0 72000 if Throttling 1 system sudo jetson_clocks restore ATP jetson_clocks_default conf recordError Throttling OFF Throttling 0 With corresponding conf files for the lower throttling 50 throttled case 50 Clock speeds sys devices system cpu cpu0 online 1 sys devices...

Page 46: ... sys devices system cpu cpu2 online 1 sys devices system cpu cpu3 online 1 sys devices system cpu cpu4 online 1 sys devices system cpu cpu5 online 1 sys devices system cpu cpu0 cpufreq scaling_min_freq 345600 sys devices system cpu cpu1 cpufreq scaling_min_freq 345600 sys devices system cpu cpu2 cpufreq scaling_min_freq 345600 sys devices system cpu cpu3 cpufreq scaling_min_freq 345600 sys devices...

Page 47: ...stem cpu cpu5 cpuidle state1 disable 0 sys devices 17000000 gp10b devfreq 17000000 gp10b min_freq 114750000 sys devices 17000000 gp10b railgate_enable 0 sys kernel debug bpmp debug clk emc mrq_rate_locked 0 sys devices pwm fan target_pwm 255 sys devices pwm fan temp_control 1 Also here is the command to set CPU use all six cores system sudo nvpmodel m2 ...

Page 48: ...rk in progress The goal is to provide a leg up in customizing the Nvidia Jetson software into a well controlled maintainable embedded end product Your customization is the real value add in this ecosystem We want to help make it easy to move your current work to newer versions of the upstream sources The Nvidia software appears to be intended for proof of concept engineering Our goal is to wrap th...

Page 49: ...tion point for the versioned output Status Currently there are no scripts or software to support work product yet Instructions for setting up a project directory Description of source files c w_c312_resource tar xz description archive containing the project resource kit obtain from Curtiss Wright support team create This is a git repo You can make your own local branches to customize this as neede...

Page 50: ...ase image set unarchive the correct version of a saved image set then do a reuse style deploy to avoid recreating the image set or 4B Develop a new image start by populating the needed source files 5 Deploy the image that is now in the top level build directory 6 For releases the appropriate portion of the overlays top level can be archived Detailed instructions Development for the DuraCore c312 i...

Page 51: ... Currently you will need to watch the output of the script carefully Currently trying to mount a second independent development overlay fails sudo bash Note that both setup and some of the build steps need to be done as root cd path workspace_name Resource source c w_setup sourceme Choose Option 4A or 4B 4A Set up a release image for Deploy In this section we see how to restore a correctly stored ...

Page 52: ...hat will allow you to change kernel settings Add any project specific drivers that you may need Now we can build C312_MakeWP Then prepare the image C312_PrepWPArea 5 Deploy the image that is now in the top level build directory Then you can flash the module5 See How to deploy an image to C312 for detailed hardware setup Connect the USB cable tx2 micro USB to dev ubuntu USB A Connect Ethernet cable...

Page 53: ...ces which should be kept under git source control so for this example the sources directory is not included Other large items in top which are not needed to redeploy are rootfs and system img raw These are also excluded Please note that the reasom we are using overlays and that we unmount for this step is to easily avoid capturing all the other Nvidia materials in the release image capture tar C p...

Page 54: ...n the force reload button in reach Hold the force reload button down while powering on Wait 20 seconds after powering on before releasing the button In the base Resource development directory run source cw_setup sourceme if you are in a terminal that has not had this done already Now run C312_ImageFlash in that same terminal C312_ImageFlash Additional Notes Overlays should ideally be unmounted bef...

Page 55: ...t If not it will be available in one of the next releases To properly develop using the Nvidia provided code you really need to have a local git server If you already have one then add the pre mirrored git repos in c w_git_soources tar xz to an appropriate directory that your git server can serve You will then be ready to develop as shown above If you do not have a git server you can add a simple ...

Page 56: ...t cut improvement try using tuned with the provided default profiles tuned d starts the tuned daemon tuned p tuning profile apply a tuning profile where tuning profile network throughput or tuning profile network latency Retest the communication using iperf Various network parameters can be tuned by hand using ethtool An internet search for linux network Ethernet tuning provides guidance for this ...

Page 57: ...7800 port defining the MAC address Your MAC address can be found in the etc C312 version yml file Example iface eth1 inet static hwaddress AA BB CC DD EE FF address 192 168 1 55 network 192 168 1 0 netmask 255 255 255 0 gateway 192 168 1 1 When there is a configuration in the interfaces file Network Manager will ignore the dev eth1 port There is no other supported configuration for the early relea...

Page 58: ...le industrial M 2 Next generation form factor for data storage and additional interfaces M 2 SSD NVMe based storage NVMe Non Volatile Memory Express PCIe based LRU Line Replaceable Unit SoM System on Module EAU Early Access Unit OS Operating System This refers to the NVIDIA Jetpack L4T and the DuraCOR 312 specific image L4T Linux for Tegra NVIDIA Jetson specific Linux build ...

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