EAI 580, Reference Handbook

Page 1: ...ANALOG HYBRID COMPUTING SYSTEM REFERENCE HANDBDDK...

Page 2: ...ANALOG HYBRID COMPUTING SYSTEM REFERENCE HANDBDDK ELECTRONIC ASSOC1ATES INC t968 PRINTED IN U S A PUBL NO 00 800 2055 0 MARCH 968...

Page 3: ...tem are normally supplied with the sys tem Title Handbook of Analog Computation Basics of Parallel Hybrid Computation 580 Reference Handbook 580 Console Components Manual 580 Computing Components Manu...

Page 4: ...lying the required information will speed the proceSSing of your requests and aid in assuring that the correct items are supplied It is the policy of Electronic Associates Inc to supply equipment patt...

Page 5: ...d Associates ltd 65 Martin Ross Avenue Downsview OntariO Canada Tel 416 636 4910 ANALYSIS AND COMPUTATION CENTERS Princeton Analysis and Computation Center U S Route No I P O Box 582 Princeton New Jer...

Page 6: ...1 25 1 7 READOUT DEVICES 1 28 CHAPTER 2 OPERATIONAL AMPLIFIERS 2 1 INTRODUCTION 2 1 2 2 DUAL DC AMPLIFIER PATCHING 2 1 2 3 QUAD DC AMPLIFIER PATCHING 2 4 CHAPTER 3 ATTENUATORS AND FEEDBACK LTIMITERS...

Page 7: ...TRAY 7 1 INTRODUCTION 7 2 THE TRACK STORE CIRCUIT 7 3 TIlE D A SWITCH CHAPTER 8 THE MDFG 8 1 INTRODUCTION 8 2 LOCATION AND ADDRESSING e 3 APPLICATIONS 8 4 SETUP PROCEDURE CHAPTER 9 COMPARATORS AND FU...

Page 8: ...10 9 A SEL PATCH TERMINAL 10 10 TIMER PATCH TERMINALS 10 1 10 1 10 3 10 3 10 3 10 3 10 3 10 3 10 11 OVD ORR AND OLS PATCH TERMINALS 10 4 10 12 PP PATCH TERMINAL 10 4 APPENDIX 1 SIMPLE CIRCUITS USING A...

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Page 10: ...rtion Amplifier Balance Control Locations Computer Component Field Assignment Areas Removal of Computing Component Patching Block Replacement Keyboard Analog Readout Panel Auxiliary Control Panel Logi...

Page 11: ...ch 4 5 Quarter Square Multiplier Patch Blocks 5 2 Quarter Square Mu ip1ier Simplified Diagram 5 3 Multiplier Patching for Multiplication 5 4 Multiplier Patching for Division 5 5 Multiplier Patching fo...

Page 12: ...t Function Effect of Changing Slope Pot 5 on DFG Output DFG Setup Panel Lower DFG Drawer Upper DFG Drawer Typical Function Requiring Slope Amplification Initially Horizontal Eleven Segment Function A...

Page 13: ...Figure 1 1 580 Analog Hybrid Computing System viii...

Page 14: ...ins the overload indicators DVM readout an expansion and a multi range voltmeter The Auxiliary Control Panel immediately to the left of the analog patch panel includes 10 handset potentiometers and ov...

Page 15: ...Figure 1 2 Typical Pre Patch Panel Field Layout 1 2...

Page 16: ...ANALOG READOUT PANEL LOGIC PATCH PANEL ANALOG PATCH PANEL Figure 1 3 Physical Layout oj the 580 Computer MDFG DRAWERS 1 3...

Page 17: ...aragraph 1 3 5 of this section 4 Allow a few minutes warm up at least 1 2 hour for the DVM time to assure that the computing components including the DVM are up to normal operating temperature Ground...

Page 18: ...4 PIN BOTTLE PLUGS 4 PIN BOTTLE PLUGS THESE PINS JUMPERED Figure 1 4 Amplifiers with Four Pin Bottle Plugs Providing Feedback 1 5...

Page 19: ...1 6 DVM ZERO ADJUSTMENT DVM READOUT F igure 1 5 DVM Z ero Adjustment Location...

Page 20: ...s found to be unbalanced an adjustment is required The amplifier balance is checked as follows 1 2 5 1 Allow a warm up of 15 to 30 minutes Place the voltmeter FUNCTION switch in the ABAL position and...

Page 21: ...Figure 1 6 Pre Patch Panel Insertion 1 8...

Page 22: ...BALANCE CONTROLS a 0 6 0614 Dual DC Amplifier BALANCE CONTROLS b 0 6 0704 2 Quad DC Amplifier Figure 1 7 Amplifier Balance Control Locations 1 9...

Page 23: ...A25 A29 D A A31 FIR A35 A39 D A A40 ATTEN A42 QUAD A48 ATTEN A50 ATTEN A52 QUAD AS8 ATTEN P40 A43 LOG P45 T P50 A53 LOG P55 R P44 DFG P49 U P54 DFG P59 AMPL INT AMPL AMPL N AMPL INT AMPL AMPL MDFG K...

Page 24: ...urely in place by the retaining strips on the front of the pre patch panel Figure 1 IOa 2 The retaining strip above or below the patching block may be removed to change blocks The retaining strip is r...

Page 25: ...a Retaining Screw Location b Using Extraction Tool Figure 1 9 Removal of Computing Component 1 12...

Page 26: ...a Removal b Replacement Figure 1 10 Patching Block Replacement 1 13...

Page 27: ...oltage for automatic setting of the Servo set potentiometers The CL SET pushbuttons are used to clear or to an addressed pot once the RDAC pushbuttons have been activated The POT CONTROL lever allows...

Page 28: ...Figure 1 11 Keyboard 1 15...

Page 29: ...the summing junctions of the integrators and track store units D lO Same as the D derivative pushbutton except that in voltage readout is divided by a factor of 10 P The P potentiometer pushbutton co...

Page 30: ...mer circuit generates the precise time intervals necessary to control the analog modes of the computer for iterative or repetitive operation The TIME SCALE pushbuttons p ovide a 500 to 1 speed up of t...

Page 31: ...le Thus the scaled output is tit where t is the length of the max max operate cycle This is a unit scaled notation the run terminates when t t max which means tit 1 0 unit or 10 volts max 1 3 6 3 Cont...

Page 32: ...le by local patching to speed up a factor of 10 to 1 individual integrators Table 1 4 Time Periods TIME SCALE X Multiplier Vernier Time 2 MS XO l 0 5 to 10 5 100 LS to 2 MS 2 MS XI O 0 5 to 10 5 1 MS...

Page 33: ...ntary contact switches which when depressed select a new6cloc rate and electrically clear the previously selected clock rate The 10 10 and 10 pushbuttons include lamps which indicate which clock rate...

Page 34: ...ing may range from O OOOO to 1 1999 which when mUltiplied with the reference voltage represents the voltage into the DVM As an example a reading of 1 1999 is equivalent to 11 999 volts UNITS DISPLAYED...

Page 35: ...1 22 VOLTMETER RANGE SWITCH AMPLIFIER OVERLOAD INDICATORS DVM READOUT DISPLAY VOLTMETER 0 VOLTMETER FUNCTION SWITCH Figure 1 12 Analog R eadout Panel...

Page 36: ...COMPAlAto S FUNCTION llAYS POt Figure 1 13 Auxiliary Control Panel 1 23...

Page 37: ...he stabilizer of a selected amplifier to the meter for balancing purposes Meter deflection should be less than 1 2 division deflection for balanced amplifier Connects the stabilizer of either the serv...

Page 38: ...The operation of the various controls and indicators mentioned above are described in the following paragraphs 1 6 1 The Digital Patc Panel The digital patch panel Figure 1 15 is used to provide acces...

Page 39: ...EGISTER CONTROLS INDICATORS AND AND INDICATORS THUMBWHEEL SWITCHES FOR COUNTERS GENERAL PURPOSE PUSHBUTTONS REP OP TIMER CONTROLS DIGITAL PATCH PANEL Figur e 1 14 Logic Control and Indicator Panel 1 2...

Page 40: ...I L D 1 i Figure 1 15 Digital Patch Panel 1 27...

Page 41: ...count In the event the count is less than 10 0 through 9 the left thumbwheel is set to zero The counter is reset by patching a high to the R reset patch terminal or de pressing the manual reset R push...

Page 42: ...s such as the EAI 1110 VARIPLOTTER or strip chart recorders such as the EAI 8875 RECORDER can also be used to display problem variables These readout devices are connected to the 580 Computer by means...

Page 43: ...1 30 AT ii RECORDER CONNECTOR REC I Figure 1 16 Readout Device Connectors OSCILLOSCOPE CONNECTOR SCOPE I j...

Page 44: ...of the non linear components is covered in the separate sections of this manual pertain ing to the particular component This section is limited to the description of the amplifier used in conjunction...

Page 45: ...OK 10K 10 loon I I g SET POT BUS RELAY TO KI SET POT RELAY K2 b 6 704 2 Quad DC Amplifier Patch Block and Simplified Schematic L SET POT RELAYS SHOWN IN DE ENERGIZED CONDITION 2 DUAL AMPLIFIERS HAVE t...

Page 46: ...onfiguration RJ J 0 o eo 10K d Simplified Schematic Gain of 0 1 and 1 lOOK RJ J 0 o eo b Simplified Schematic Gain of 1 and 10 eo O IXI 0 IX2 0 IX3 X4 e Programming Symbol Gain of 0 1 and 1 ADDITIONAL...

Page 47: ...ack resistors for each amplifier circuit This permits wide band width low offset inversion The 10K ohm resistors are accurately matched to ensure true unity gain inversion Figure 2 3 shows the normal...

Page 48: ...circuits used in the 580 for setting grounded attenuators under load Relay Kl is energized when the cdmputer is placed in set pot mode and applies reference voltage to the high end of all grounded att...

Page 49: ...3 2 AmNUATOIS 00 POl 0 06 07 1 9 a Handset Attenuators b Servo Set Attenuators Figure 3 1 Attenuators...

Page 50: ...ATIC a Grounded Potentiometer Qoo TO SELECTOR SIMPLIFIED CIRCUIT DIAGRAM x HI K Y X Y Y Lo SCHEMATIC b Ungrounded Potentiometer Figure 3 2 Potentiometer Configurations COEFFICIENT E TING X k KX TENTIO...

Page 51: ...cting the Hi side top of two potentiometers to the appropriate reference levels and the wipers to the proper limiter inputs 3 2 3 Setting the Limit Value The diode action of the base emitter junction...

Page 52: ...J e F8 e LJ e L 0 l L 0 l POT LIMITER 0 420342 Figure 3 3 Feedback Limiter Patching Block a Computer Diagram FBO LJO LO b Patching Diagram FBO LO POT LIMITER 0 42 0342 Figure 3 4 Typical Limiter Patch...

Page 53: ...LIMIT CURVE KNEE 1 a 0 I 2 INPUT Figure 3 5 Limit Curve 3 6...

Page 54: ...s are physically located adjacent to a dual dc ampli fier to facilitate the usage of bottle plugs for patching 4 2 1 Integrator Mode Control The initial condition IC operate OP and hold HD integrator...

Page 55: ...4 2 a Dual Integrator OJO IJO cO leO OFASTO o pO Ole 0 POT I NTEGRATOR 0 12 1 675 b Single Integrator With Attenuator Terminations Figure 4 1 Integrator Patching Blocks...

Page 56: ...TLE PLUG W Wliit TWO PRONG BOTTLE PLUG DUAL AMPLIFIER DUAL INTEGRATOR 0 6 0614 1 0 12 1611 TEE BOTTLE PLUG IDENTICAL WITH SINGLE INTEGRATOR TWO PRONG BOTTLE PLUG FOUR PRONG BOTTLE PLUG Figure 4 2 l yp...

Page 57: ...n the IS state The FAST terminals when bottled effectively slow down computer operation by increasing the value of the integrator feedback capacity This is accomplished by paralleling the 1 f capacito...

Page 58: ...1 F J JIv 10 f1v _ 10 J Figure 4 3 Integrator Used as a D A Switch o 4 5...

Page 59: ...rminals 4 2 3 2 Differentiator To operate the integrator as a differ entiator remove the bottle plug from the C patch terminal Connect two prong bottle plug between a gain of one amplifier input and t...

Page 60: ...blocks and patching procedures for the 0 7 0146 and 0 7 0148 Quarter Square Multipliers are identical only the 0 7 0146 is described below Figure 5 2 is a simplified diagram of the multiplier Note tha...

Page 61: ...r r MULTIPLIER 0 7 0148 a O 7 0146 Dual Multiplier b 0 7 0148 Multiplier c 0 07 0150 Multiplier Figure 5 1 Quarter Square Multiplier Patch Blocks 5 2...

Page 62: ...UARING MINUS SQUARING PLUS SQUARING MINUS SQUARING a Upper Multiplier PLUS SQUARING MINUS SQUARING PLUS SQUARING MINUS SQUARING b Lower Multiplier Figure 5 2 Quarter Square Multiplier Simplified Diagr...

Page 63: ...5 4 OUTPUT FROM UPPER MULTIPLIER OUTPUT FROM LOWER MULTI PLI ER X _ y X t y X y y y DUAL MULTIPLIER 0 7 0146 Figure 5 3 Multiplier Patching for Multiplication...

Page 64: ...E A o X X 1 yO yO DUAL MULTIPLIER 0 7 0146 Figure 5 4 Multiplier Patching for Division 5 5...

Page 65: ...5 6 XY X 2 IF X Y DUAL MULTIPLIER 0 7 0146 YIN 1 10K 1 B EXTERNAL RESISTOR Figure 5 5 Multiplier Patching for Squaring Two Squaring Circuits Shown...

Page 66: ...FBO yO DUAL MULTIPLIER 0 7 0146 _ Jv Vv B OSBS IOV ITeT EXTERNAL RESISTOR Figure 5 6 Multiplier Patching for Square Root 5 7...

Page 67: ...patch terminals are described in Chapter 8 Operationally each of the multipliers in this tray are identical to the lower multipliers in the 0 7 0146 and 0 7 0148 Trays Figure 5 2b Physically the feedb...

Page 68: ...PLIER XO OUTPUT xO INPUT TO UPPER MULTIPLIER yO yO 10 xO o g 00 MULTIPLIER xO j OUTPUT INPUT TO LOWER xO I 0 MULTIPLIER yO X 0 yO _70 J MULTIPLIER 0 07 0150 Figure 5 7 Multiplier Patching for Multipli...

Page 69: ...5 10 MULTIPLI ER_ ____ OUTPUT 0 A IoFd I_ 0 STILL AVAILABLE AS MULTIPLIER I 4 10 xO o MULTIPLIER 0 07 0150 Figure 5 8 Multiplier Patchingfor Division...

Page 70: ...ors accept a neg ative input voltage X and proauce an output voltage of 1 2 10glO C lOOX NOTE The abbreviation log indicates the logarithm to the base 10 The abbreviation In is used for natural logari...

Page 71: ...RI 5000 FB 0 IN 0 LOG X FJ 0 R2 FB 5000 0 IN 0 LOGX FJ 0 R3 FB 5000 0 IN 0 LOG X PATCHING BLOCK FJ 0 R4 FB 5000 0 IN 0 LOG X Figure 6 1 Log X DFG Simplified Schematic and Patch Block 6 2...

Page 72: ...0 X XIN XIN POSITIVE 1 2 LOG IOOX XIN XIN NEGATIVE FBO INa FJO o QUAD LOG DFG 0 160355 X IN LOG 1 2 LOG lOOX X IN LOG 1 2 LOG 100 X NOTE 1 01 REFERENCE lxINI 5REFERENCE VOLTAGE Figure 6 2 Log X DFG Pa...

Page 73: ...unit in the IC mode It overrides the T logic control signal The upper IC terminal provides an input for the analog initial condition voltage for the store capacitors When the track T input is high the...

Page 74: ...Figure 7 1 Track store D A Switch Patch Block 7 2...

Page 75: ...T TJ OJ 4I o 0110 4 I lOOK Ie 10K OJ 4 I 10K 1 20V I I I I I I I I I KI Figure 7 2 Track store Circuit Simplified Diagram 7 3...

Page 76: ...7 4 oIV IF 10 R J 10 ANALOG INITIAL L L t CONDITION INPUT TRACK CONTROL _ 11 _ _ _ TRACK IC INPUT ____________ __ Figure 7 3 T S Patching Typical...

Page 77: ...LOGIC t 9 SIGNAL SWO ANALoGi R IO 81 i INPUT o SWJ POT T S O A 0 42 0341 Figure 7 4 D A Switch Patching Typical 7 5...

Page 78: ...7 6 The SWJ switch junction terminal is the output of the switch The input of the device the amplifier in Figure 7 3 recovering the switched analog voltage is patched to this terminal...

Page 79: ...configuration the first DFG in a pair is the DFG capable of accepting positive inputs The second DFG is a DFG capable of accepting negative inputs Either type of DFG can produce either posi tive or ne...

Page 80: ...0 0 0 0 0 0 c 0 c 0 c 0 J I 1 R eJ wo MDFG READ OUT 0 16 0358 a Separate Patch Block QUAD lOG DFG 0160355 b MDFG Patching Terminations on a Typical Multifmrpose Tray Figure 8 1 MDFG Patching Terminati...

Page 81: ...ly on the DVM during setup An alternate procedure illustrated in Paragraph 8 4 4 skips the table and consists of setting up the function of an X y plotter The procedure is exactly the same but the ope...

Page 82: ...be little point i putting any breakpoi t here so the process starts by drawing two fairly long segments to appr6ximate the function over these intervals o The intervals from 002 to 006 and from 0 8 t...

Page 83: ...Y f X 1 0 OFF 1 9 10 I l V 0 J 8 2 V 1 7 I J 3 r V 6 4 0 0 9 0 8 0 7 0 6 0 5 0 4 0 3 0 2 FF 0 1 o x o 0 1 0 2 0 3 0 4 0 5 0 6 0 7 0 8 0 9 1 0 Figure 8 0 2 Typical Ten Segment Function 8 5...

Page 84: ...at that point due to the fact that the diode is not a perfect switch The corner at x Figure 8 3 is somewhat rounded and a slight shift in f x 5 will occur w en setting f x 6 In many cases this shift...

Page 85: ...y f x __ __________ __ ____ x Figure 8 3 Effect of Changing Slope Pot 5 on DFG Output 8 7...

Page 86: ...8 8 FOUR 10 SEGMENT DFG S Figure 8 4 DFG Setup Panel Lower DFG Drawer SETUP PANEL...

Page 87: ...n the SETUP switch near the front of the drawer There is one switch for each pair of ten segment DFG s When the SETUP switch for any DFG is turned on the F button on the signal selector keyboard will...

Page 88: ...8 10 IO 20 lNV SWITCH BREAKPOINT POTS SEGMENT SELECTOR PARALLAX CONTROL AND SWITCH I Figure 8 5 Upper DFG Drawer...

Page 89: ...value is read directly on the DVM to read the corresponding function Talue depress the appropriate switch Each switch is momentary it must be held down while setting f x When the switch is released t...

Page 90: ...er direction if the output moves in the wrong direction the switch should be reversed In any case it is the direction of change that is important the function value should change in the right directio...

Page 91: ...g that no such error has been made the problem is probably one of insufficient slope For each segment there is an upper limit to the amount of slope change that it can introduce this is the amount pro...

Page 92: ...ve was initially drawn free hand on a sheet of graph paper and in serted in the X Y plotter Breakpoints and function values were set direct ly by observing the plotter not the DVM Hence there was no n...

Page 93: ...0 0 9 0 8 0 7 I 0 6 0 5 0 4 0 3 OFF 0_2 I 0 1 o I j I I I r2 4 N 9 8 V Ie 5 il i J IL f OF 7 t 6 1 o 0 1 0 2 0 3 0 4 0 5 0 6 0 7 0 8 0 9 1 0 Figure 8 6 Typical Function Requiring Slope Amplification...

Page 94: ...its length and that the maximum deviation was about 0 3 No trimming adjustments were necessary 8 0 4 0 6 Eleven Segmen Functions At this point the reader may be wondering what Breakpoint 1 is for The...

Page 95: ...Y f X 1 0 9 v I I I 7 10 I It 4 OFF j 4 t OFF T 0 9 0 8 0 7 0 6 0 5 0 4 0 3 I 0 2 0 1 o x o 0 1 0 2 0 3 0 4 0 5 0 6 0 7 0 8 0 9 1 0 Figure 8 7 Initially Horizontal Eleven Segment Function 8 17...

Page 96: ...the pot simply provides linear gain from the input to the output If f O 0 then there is no need for a pot to set the initial slope Hence by adding one more pot breakpoint pot 1 an additional segment b...

Page 97: ...h 1 determine the slope at x 0 This slope is determined by a pot and input resistor like the PARALLAX controls one of these is redundant in twenty segment operation However unlike the PARALLAX control...

Page 98: ...s where it is relatively straight o One of the curved regions lies in the negative half of the graph and another in the positive half Since the third curved re gion lies mostly on the positive side it...

Page 99: ...0 6 2 3 O 2 5 y I J C 0 4 1 1 I 0 3 l 10 16 0 2 6 9 I V Y I 0 1 I i V x 1 0 0 9 0 8 0 7 0 6 0 4 0 3V 0 2 0 1 0 0 1 0 2 0 3 0 4 0 5 0 6 0 7 0 8 0 9 1 0 0 5 _A I 11 I 0 1 8 5 7 6 0 2 Figure 8 8 A Typic...

Page 100: ...he first positive breakpoint Turn this SEGMENT SELECTOR off and put the other SEG MENT SELECTOR in position 2 to read the value at the first negative break point Note the switch positions as tabulated...

Page 101: ...ect The value of f O is of course no longer equal to the tabu lated value but the values at the two breakpoints are correct The inter action between settings means that after setup the value of f O ma...

Page 102: ...ages goes negative The L terminal can be used to inhibit the comparator output at a particular point in a sequence of events or after a predetermined number of clock periods utilizing th3 digital coun...

Page 103: ...Figure 9 1 Com parator and Function Relay Patching Area 9 2...

Page 104: ...e relay is retained in the selected state until a high is patched to the alternate state at which time it will change states BEING CAUTION Damage to the relay will result if reference voltage is groun...

Page 105: ...ed in the PP position The RANGE switch selects the proper meter rang for the input voltage 10 4 IC AND OP PATCH TERMINALS The IC and OP patch terminals provide inputs to their respective bus bars thro...

Page 106: ...10 2 DVM A5E o 0 VM IOAC a IC A Ope I z E x VJ OLS PP CONTROL 0 12 1607 Figure 11 1 Control Tray Patch Panel...

Page 107: ...recorder available fOr use with the 580 Computer A high patched at this ter minal turns on the recorder A low returns the recorder to the OFF state 10 8 RDAC PATCH TERMINAL The RDAC terminal is conne...

Page 108: ...an overload occurs The OLS ov erload stores patch terminal is used to detect and locate short term intermittent overload conditions During normal operations the over load indicators light as overload...

Page 109: ...CATION BY 10 5 MULTIPLICATION BY k for I k 10 for k I use circuit I feeding circuit 3 6 MULTIPLICATION BY 2 7 MULTIPLICATION BY CIRCUIT e l rke t k POTENTIOMETER SETTING lOOK 100 K i l e e lOOK 10K r...

Page 110: ...CIRCUIT DESCRIPTION CIRCUIT PROGRAMMING 10K 8 MULTIPLICATION BY 10 e lOOK _ IO e Al 2...

Page 111: ...ample if a problem variable P has a maximum value of 50 Ibs then the corresponding computer variable is simply P 50 which has a maximum value of one In unit scaling every computer variable is Simply t...

Page 112: ...A2 2 A more complete description of the unit scaling technique is given in Chapter 3 of the Handbook of Analog Computation available from EAr...

Page 113: ...ions A more complete listing may be found in Jackson A S Analog Computation McGraw Hill Book Company Inc New York 1960 NO BODE PLOT o 0 2 K T K I Ej 0 0 K 4 TK I T TRANSFER FUNCTION Eo EI A 1 1 Tp K 1...

Page 114: ...eful networks for simulating transfer functions A more extensive listing may be found in Jackson A S Analog Computation and Fifer S Analog Computation See Bibliography NO I 2 3 NaTE The short circuit...

Page 115: ...pOT 0 1 R2 R2 C 0 R1 R2 R2 2R1 R2 1 1 pOT A A 1 pT 2R1 R2 6 R 1 C 2R1 0 1 T 2 0 T 2R1 R2 R R A 2R1 1 1 pOT T R2 lJ 7 A 1 pT C 0 1 2R2 I C 0 2R2 R1 A 2R R R 1 1 pOT R 8 A 1 pT T 2 C 1 C2 o 1 2C 2 C2 o...

Page 116: ...APPENDIX 4 REPRESENTATION OF CONSTRAINTS AND NONLINEARITIES I HARD ZERO LIMIT 2 HARD ZERO LIMIT 3 ABSOLUTE VALUE 4 DEAD SPACE x x x FOR lxi REVERSE THE DIODES REF y y y 0 K l L 1 1 0 1 y x y 0 x A4 1...

Page 117: ...A4 2...

Page 118: ...W JTl B __ AN D tr oI lTP T INPIIT 2 OUTPUT PROC iIl AMMER S 1U80 L 5 I P V ouTPuT 1 Z L L L L 4 L H H H TWO INPUT AWD ATE PATC OUTPUT PATC H NCa tN9UT I to L L H L H H 4 4 H H 3 L L L H H wP lT i t...

Page 119: ...PUT lS t HBiTt D A JO CAR t y OVT C O G OE LOW ANt Co G oE 1 4 5 THE CARRY IN e1 HOJ E MAY BF PArCHED To oTHaR INPu1 5 PATCH PANEL CLOCK OUTPUTS Af lD uSED AS A COUNTeR 5 PROCaRAl A a 4E R S I 130 t N...

Page 120: ...CIATfD L nE t PVSH p JrrON 0 LO IC PA JE l I DE p Esse D 3 TrtlAE OUTPur LO W E A C ATt D U lE n i D PUstlaUTTO I s DtPf E c f 0 4 PUS ING LJNLETTERED PuSH 8fJTTON AGAi PRODUCES 1 L SEC PULSES FOR PRO...

Page 121: ...UTPuT eL EAc tJ puT P n Al E PI4 C MODE pe 2030 oOs O 2C O 00 00 A op ourPuT OP INPuT RU OUTPUT RUN oUTPlJl RUN I t IPUl PAR LLEL S D 6 R MbOE PS PPOVTF UT HI oi 4 PP MOO USED FoR FUTU E H I R D tPA O...

Page 122: ...TI UNK 0 CON EC TS iO OTt W c PL J6 TO AT T UNK I C W T TO OT2 0 N C owNE C tI PAN L Co hlE 1 TO T 0 c O 1 e cT P lEL D G ITAl nUN PATCl41 Ca TE t A NAiIO S J A5 5...

Page 123: ...wl J COIAIJT R MOpE PAIlALlEL INPII B el PATC HINU _ CAlt t V O IT NOT S r COUNTER pJl SEr USI NC REC I TE PS ON LO IC CONTROL PANEL t l PB 0 PIZ T HI PBI PRE E n FFZ PB2 PREseT FF4 P8 PR E 5 TS FFS P...

Page 124: ...ublishing Company Inc Reading Massachusetts 1959 Karplus W J Analog Simulation McGraw Hill Book Company Inc New York 1958 Mathews M V and Seif rt W W Transfer Function Synthesis with Computer Amplifie...

Page 125: ...ting in the Chemical and Petroleum mdustries Past and Present Williams T J mdustrial and Engineering Chemistry Vol 50 1958 p 1631 Application of General Purpose Analog Computer to Unsteady State Disti...

Page 126: ...al Engineers Vol 76 Pt II No 31 July 1957 pp 105 109 discussion pp 109 110 Jet Engine Simulation for Engine Sontrol Development Work Sherrard E S Proceedings of the National Simulation Council present...

Page 127: ...earch and Development Command WADD Technical Note 59 344 Project 1365 Wright Patterson Air Force Base Ohio July 1960 ASTIA No AD 246 530 Simulation of Military Vehicle Suspension Systems Sattinger I J...

Page 128: ...ris A 1958 IRE WESCON Convention Record Vo1 2 pt 1 presented at Los Ange les August 19 22 1958 pp 70 85 and Microwave Applications Seminar Electronic Associates Inc Computation Center at Los Angeles O...

Page 129: ...ng Analog Computer Reihing J V Jr Proceedings of the Western Joint Computer Conference presented at San Francisco March 3 5 1959 p 341 Analog Representation of Heat Exchange Application to the Simulat...

Page 130: ...ss Title Type of System Manual Title EAr Project No Publication No Check appropriate block and explain in space provided o Error Page o o Explanation Addition Page Other or Drawing No Drawing Procedur...

Page 131: ...USINESS REPLY CARD NO POSTAGE NECESSARY IF MAILED IN THE UNITED STATES POSTAGE WILL BE PAID BY ELECTRONIC ASSOCIATES INC 185 Monmouth Parkway West Long Branch New Jersey 07764 FIRST CLASS PERMIT NO 9...

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