Freescale Semiconductor MPC5668EVB, User Manual

Page 1: ...MPC5668EVB Users Manual Revision 0 1 May 2009 ...

Page 2: ...erating parameters including Typicals must be validated for each customer application by customer s technical experts Freescale Semiconductor does not convey any license under its patent rights nor the rights of others Freescale Semiconductor products are not designed intended or authorized for use as components in systems intended for surgical implant into the body or other applications intended ...

Page 3: ... 3 4 ONCE AND NEXUS CONFIGURATION J32 J70 13 3 4 1 Debug Connector Pinouts 14 3 5 CAN CONFIGURATION J20 J21 J29 J30 J31 15 3 6 RS232 CONFIGURATION J6 J17 J18 J23 J24 16 3 7 LIN CONFIGURATION J3 J4 J5 J12 17 J13 J14 J15 J16 17 3 8 FLEXRAY CONFIGURATION J19 J27 J25 J26 J28 18 3 9 ETHERNET 20 3 10 MLB AND MOST 21 3 11 PHANTOM PORTS J76 J77 J78 J79 J80 23 4 MCU PIN USAGE MAP 24 5 DEFAULT JUMPER SUMMAR...

Page 4: ... 13 TABLE 3 11 JTAG NEXUS TARGET RESET ROUTING 13 TABLE 3 12 ONCE NEXUS TCLK TERMINATION CONTROL 13 TABLE 3 13 NEXUS DEBUG CONNECTOR PINOUT 14 TABLE 3 14 CAN CONTROL JUMPERS J30 J31 J7 15 TABLE 3 15 RS232 CONTROL JUMPERS 16 TABLE 3 16 LIN CONTROL JUMPERS 17 TABLE 3 17 FLEXRAY MCU SIGNAL ROUTING JUMPERS J19 J27 18 TABLE 3 18 FLEXRAY POWER CONTROL JUMPERS J25 18 TABLE 3 19 FLEXRAY CONTROL JUMPERS J2...

Page 5: ...5668 family of microprocessors and to facilitate hardware and software development At the time of writing this document the MPC5668 family is offered in a 208MAPBGA package A 256MAPBGA package supporting Nexus debug is also available for development purposes For the latest product information please speak to your Freescale representative or consult the MPC5668 web pages at www freescale com The EV...

Page 6: ...emale connector PC RS 232 compliant via a Maxim physical interface SCI channels C and D can be routed to LIN interface header 0 1 and molex connectors both will full physical transceivers FlexCAN channels A and B can be routed to 0 1 headers and DB9 connector via a Philips high speed CAN transceiver which supports both 3 3V and 5V inputs FlexCAN channels C D E and F are routed to the prototyping a...

Page 7: ... way jumpers have been aligned such that Pin 1 is either to the top or to the left of the jumper On 2 way jumpers the source of the signal is connected to Pin 1 The EVB has been designed with ease of use in mind and has been segmented into functional blocks as shown below Detailed silkscreen legend has been used throughout the board to identify all switches jumpers and user connectors Figure 3 1 E...

Page 8: ...is connector should be used to connect the supplied wall plug mains adapter Note if a replacement or alternative adapter is used care must be taken to ensure the 2 1mm plug uses the correct polarisation as shown below Figure 3 2 2 1mm Power Connector 2 Way Lever Connector P23 This can be used to connect a bare wire lead to the EVB typically from a laboratory power supply The polarisation of the co...

Page 9: ...s Enabled J83 5 0V FITTED DISABLE 5 0V switching regulator output is Disabled REMOVED D 5 0V switching regulator output is Enabled J84 5 0V LINEAR FITTED D ENABLE 5 0V linear regulator output is Enabled REMOVED 5 0V linear regulator output is Disabled 3 1 4 Power Status LED s and Fuse When power is applied to the EVB four green power LED s adjacent to the voltage regulators show the presence of th...

Page 10: ...MCU regulators to be disabled by changing VRCSEL to EXT and applying external voltages to the VDDSYN and VDD33 inputs When in 3 3v mode VDDSYN and VDD33 inputs must always be supplied externally The VDDE 1 4 pins control the pad voltages over 4 groupings of pads see the MCU reference manual for details Jumpers J41 J34 allow the VDDEx pins to be connected to the 5 0v or 3 3V switching regulators Th...

Page 11: ...ED D MCU VDD33 pin is not powered externally J50 VDDSYN FITTED MCU VDDSYN pin is powered from switching regulator REMOVED D MCU VDDSYN pin is not powered externally 3 3v 2 5V J45 VDDEMLB 1 2 D 2 5V MCU VDD pin is powered from 1 5v switching regulator 2 3 3 3V MCU VDD pin is not powered externally The jumper configuration shown in Table 3 2 details the default state of the EVB In this configuration...

Page 12: ...hwhile considering if any of the EVB components or peripherals you require will be affected Table 3 4 details a list of the various EVB components and peripherals powered by the regulators Table 3 4 Power Supply Distribution Regulator Used On 2 5V Switcher MCU VDDEMLB pins MLB INIC 1 5V Power section of Prototype area 3 3V Switcher MCU VDD33 and VDDSYN pins ONLY use when on chip MCU regulator is d...

Page 13: ...VB Clock Selection Table 3 5 Clock Source Jumper Selection Jumper Position PCB Legend Description J85 U20 PWR FITTED D EVB oscillator module U20 is powered REMOVED EVB oscillator module U20 is not powered J87 OSC SEL 1 2 D MOD Daughter card EXT CLK is routed from U20 2 3 SMA Daughter card EXT CLK is routed from P32 SMA Connector J66 Must Match J61 1 2 D Y2 MCU Clock is Y2 2 3 GND MCU Clock is Sele...

Page 14: ...n using the 32KHz crystal PA 14 and PA 15 will not be visible on P17 Port A header Figure 3 6 EVB Clock Selection Table 3 6 32Khz Crystal Jumper Selection Jumper Position PCB Legend Description J67 Must Match J71 1 2 D Y3 32Khz Crystal Y2 is connected to MCU 2 3 PA 14 Pin functions as Normal I O J71 Must Match J67 1 2 D Y3 32Khz Crystal Y2 is connected to MCU 2 3 PA 15 Pin functions as Normal I O ...

Page 15: ... Table 3 8 LVI Control Jumpers Jumper Position PCB Legend Description J75 Posn 1 2 FITTED D 5 0V switching regulator is monitored Reset switch active REMOVED 5 0V switching regulator is not monitored Reset switch inactive J75 Posn 3 4 FITTED D 3 3V switching regulator is monitored REMOVED 3 3V switching regulator is not monitored Notes If the 5 0V switching regulator is disabled for any reason the...

Page 16: ...t of an AND gate and then converted to an open drain output which is directly connected to the MCU reset pin Reset Out The MCU reset pin is buffered to provide a reset out signal capable of driving the reset LED and also multiple devices requiring a reset input The reset buffering scheme is detailed below Figure 3 7 EVB Reset Buffering Scheme Jumper J17 is used to completely disconnect the reset i...

Page 17: ...w Some debug probes have the ability to assert and also monitor the state of the MCU reset line This is not possible when the reset signal is buffered so a jumper J32 is included to allow routing the debug reset signal direct to the MCU reset pin or via the EVB Reset In buffering Table 3 11 JTAG NEXUS Target Reset Routing Jumper Position PCB Legend Description J32 JRST 1 2 D BUF JTAG reset signal ...

Page 18: ...ection Pin No Function Connection 1 Reserved 2 Reserved 3 Reserved 4 Reserved 5 MDO 9 MCU M5 6 CLKOUT MCU PK9 7 Vendor I O 2 TP25 8 MDO 8 MCU L5 9 Reset In Reset CCT 10 EVTI MCU M11 11 TDO MCU M3 12 VREF 3 3V Reg 13 MDO 10 MCU M6 14 RDY TP29 15 TCLK MCU P3 16 MDO 7 MCU K5 17 TMS MCU L3 18 MDO 6 MCU J5 19 TDI MCU J3 20 MDO 5 MCU J6 21 TRST JCOMP 22 MDO 4 MCU H6 23 MDO 11 MCU M7 24 MDO 3 MCU H5 25 T...

Page 19: ...1 J7 Jumper Position PCB Legend Description J30 Posn 1 2 FITTED D 5v is applied to both CAN transceivers VCC REMOVED No 5v power is applied to CAN transceivers J30 Posn 3 4 FITTED D 12v Power is applied to both CAN transceivers VBAT REMOVED No 12v power is applied to CAN transceivers J31 CAN A Posn 1 2 FITTED D TX MCU CNTX A is connected to CAN controller A REMOVED MCU CNTX A is NOT routed to CAN ...

Page 20: ...face as described below There is also a global power jumper J9 controlling the power to the RS232 transceiver Table 3 15 RS232 Control Jumpers Jumper Position PCB Legend Description J6 SCI PWR FITTED D Power is applied to the MAX3223 transceiver REMOVED No power is applied to the MAX3223 transceiver J18 SCI A FITTED D TXD MCU TXD A is routed to MAX3223 REMOVED MCU TXD A signal is disconnected from...

Page 21: ...ve mode as defined in the table below Table 3 16 LIN Control Jumpers Jumper Position PCB Legend Description J5 LIN C M FITTED D LIN C transceiver is configured for LIN Master mode REMOVED LIN C transceiver is configured for LIN Slave mode J3 LIN D M FITTED D LIN D transceiver is configured for LIN Master mode REMOVED LIN D transceiver is configured for LIN Slave mode J16 LIN C EN FITTED D The LIN ...

Page 22: ...4 FITTED D TXEN MCU PK8 is connected to Flexray B transceiver TXEN REMOVED MCU PK8 is not connected to Flexray B transceiver TXEN J27 Flex B Posn 5 6 FITTED D RX MCU PK6 is connected to Flexray B transceiver RX REMOVED MCU PK6 is not connected to Flexray B transceiver RXEN The power to the Flexray physical interface is controlled via jumper J25 to allow disconnection if required The Flexray physic...

Page 23: ...exray B interface BGE signal is pulled to VIO REMOVED Flexray B interface BGE signal is unterminated J28 Flex B Posn 3 4 FITTED D EN Flexray B interface EN signal is pulled to VIO REMOVED Flexray B interface EN signal is unterminated J28 Flex B Posn 5 6 FITTED D STBEN Flexray B interface STBN signal is pulled to VIO REMOVED Flexray B interface STBN signal is unterminated J28 Flex B Posn 7 8 FITTED...

Page 24: ... G and H Table 3 20 Pull up Pull down resistors on Ports G and H for Ethernet Physical Port Pin Pull Direction Strength PG 9 Down GND 2 2kΩ PG 7 Up 3 3v SR 1 5kΩ PG 12 Down GND 2 2kΩ PG 13 Down GND 2 2kΩ PG 14 Down GND 2 2kΩ PG 15 Down GND 2 2kΩ PH 1 Down GND 2 2kΩ PH 2 Down GND 2 2kΩ PH 3 Down GND 2 2kΩ PH 4 Down GND 2 2kΩ PH 5 Down GND 2 2kΩ PH 6 Down GND 2 2kΩ PH 7 Down GND 2 2kΩ The VDDE3 volt...

Page 25: ...r supplies domains referred to in this table are for the Flash based INIC Please refer to the schematics to see how this affects the supply domains of the ROM INIC if it has been fitted Table 3 22 INIC Power Supply Control J35 J36 J55 Jumper Position PCB Legend Description J35 FITTED D 3 3v PWR 3 3v is applied to VDDP1 and VDDP2 of the INIC REMOVED No 3 3v power is applied to VDDP1 and VDDP2 J36 F...

Page 26: ... to the EVB INIC 2 3 INIC150 PSO is Routed to the MOST150 header J39 MLBDAT 1 2 D EVB MLBDAT is Routed to the EVB INIC 2 3 INIC150 MLBDAT is Routed to the MOST150 header J40 SDA 1 2 D EVB SDA is Routed to the EVB INIC 2 3 INIC150 SDA is Routed to the MOST150 header J57 PS1 1 2 D EVB PS1 is Routed to the EVB INIC 2 3 INIC150 PS1 is Routed to the MOST150 header J58 INT 1 2 D EVB INT is Routed to the...

Page 27: ... detailed in table x below Table 3 24 Phantom Port Control J35 J36 J55 Jumper Position PCB Legend Description J76 FITTED D CLK PF0 DSPI A CLK is connected to the phantom port circuitry REMOVED PF0 DSPI A CLK is disconnected from the phantom port circuitry J77 FITTED D SREG PWR VDDE2 Domain power is applied to the 4 shift registers U15 U16 U21 U22 REMOVED No power is applied to the 4 shift register...

Page 28: ...ctions for example the Nexus and External bus as shown by the shaded boxes in the table below Table 4 1 EVB MCU Pin Usage Function Port A Port B Port C Port D Port E Port F Port G Port H Port J Port k Enabled By Default CANA PD 0 1 CANB PD 2 3 SCIA PD 12 13 SCIB PD 14 15 LINC PE 0 1 LIND PE 2 3 FlexRay A PK 3 5 FlexRay B PK 6 8 Reset Config PK 9 Ethernet PG 6 9 PG 12 15 PH 0 1 PH 3 7 MOST MLB PB 0...

Page 29: ...TED LIN C RX LIN C RX from MCU Connected to LIN Interface J16 LIN C FITTED LIN C EN LIN D Bus Enable Physical Interface J17 SCI A FITTED SCI A RX MCU RXD A is routed to MAX3223 J18 SCI A FITTED SCI A TX MCU TXD A is routed to MAX3223 J19 Flex A Posn 1 2 FITTED TX MCU PK4 is connected to FlexRay A transceiver TX J19 Flex A Posn 3 4 FITTED TXEN MCU PK5 is connected to FlexRay A transceiver TXEN J19 ...

Page 30: ...n 1 2 FITTED VCC 5v is applied to both CAN transceivers VCC J30 CAN Posn 3 4 FITTED VIO Power is applied to both CAN transceivers VIO J31 CAN A Posn 1 2 FITTED TX MCU CNTX A is connected to CAN controller A J31 CAN A Posn 3 4 FITTED RX MCU CNRX A is connected to CAN controller A J32 JRST 1 2 BUF JTAG reset signal is buffered to MCU RESET pin connected to the MCU Reset In circuitry J33 CAN Status N...

Page 31: ... J69 BOOT CFG 1 2 FLASH MCU boots from internal flash J70 TCLK PULL 1 2 VDDE2 JTAG NEXUS TCLK signal is pulled to VDDE2 via 10KΩ J71 32KHz CLK 1 2 Y3 32Khz Crystal Y2 is connected to MCU J72 Not Implemented J73 ADC VSUP REMOVED Output from variable resistor RV1 is applied to MCU PA0 J74 REMOVED On board Voltage levels not connected to EVB J75 1 2 FITTED Enables 3 3v board level LVI J75 3 4 FITTED ...

Page 32: ...the EVB core voltages to be monitors by the ATD J74 allows the 2 5v 3 3v and 5v Switcher and Linear regulator outputs to be connected to the ATD inputs J73 allows the 12v EVB supply to be monitored via resister ladder to reduce the voltage to a level that is in spec of the ATD s range 65 of the 12v supply is applied to the ADC via the resistor ladder Table 6 2 RV1 Connection Jumper J8 Jumper Posit...

Page 33: ...Port C Connector Pinout P19 Pin Function Pin Function GPIO 1st Alt GPIO 1st Alt 1 PC0 AN32 2 PC1 AN33 3 PC2 AN34 4 PC3 AN35 5 PC4 AN36 6 PC5 AN37 7 PC6 AN38 8 PC7 AN39 9 PC8 AN40 10 PC9 AN41 11 PC10 AN42 12 PC11 AN43 13 PC12 AN44 14 PC13 AN45 15 PC14 AN46 16 PC15 AN47 17 GND 18 GND 6 1 4 Port D CAN I2C SCI P20 Table 6 5 Port D Connector Pinout P20 Pin Function Pin Function GPIO 1 st Alt GPIO 1 st ...

Page 34: ...F10 SIN_C 12 PF11 PCS_C 0 13 PF12 SCK_D 14 PF13 SOUT_D 15 PF14 SIN_D 16 PF15 PCS_D 0 17 GND 18 GND 6 1 7 Port G DSPI eMIOS FEC P27 Table 6 8 Port F Connector Pinout P27 Pin Function Pin Function GPIO 1 st Alt GPIO 1 st Alt 1 PG0 PCS_A 4 2 PG1 PCS_A 5 3 PG2 PCS_D 1 4 PG3 PCS_D 2 5 PG4 PCS_D 3 6 PG5 PCS_D 4 7 PG6 PCS_C 1 8 PG7 PCS_C 2 9 PG8 eMIOS 7 10 PG9 eMIOS 6 11 PG10 eMIOS 5 12 PG11 eMIOS 4 13 P...

Page 35: ... 9 8 PJ7 eMIOS 8 9 PJ8 eMIOS 7 10 PJ9 eMIOS 6 11 PJ10 eMIOS 5 12 PJ11 eMIOS 4 13 PJ12 eMIOS 3 14 PJ13 eMIOS 2 15 PJ14 eMIOS 1 16 PJ15 eMIOS 0 17 GND 18 GND 6 1 10 Port K RESET MLB Connector P30 Table 6 11 Port K Connector Pinout P30 Pin Function Pin Function GPIO 1 st Alt GPIO 1 st Alt 1 PK0 MLBCLK 2 PK1 MLBSIG 3 PK2 MLBDAT 4 PK3 FR_A_RX 5 PK4 FR_A_TX 6 PK5 FR_A_TX_ EN 7 PK6 FR_B_RX 8 PK7 FR_B_TX ...

Page 36: ... prototyping area are connected to the CAN C F pins of the MCU as well as power and the DB9 connectors This allows an additional 4 CAN physical interfaces to be added to the EVB for evaluation with the MCU The layout of this is shown in Figure X below Note The power supply lines to the prototype area are connected directly to the regulator outputs and not connected to the jumpered MCU supply There...

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